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authorThomas Richter <tmricht@linux.ibm.com>2018-10-29 13:16:38 +0000
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2019-02-22 09:19:56 +0100
commitfe5908bccc565f85cab025695627678cf257f91e (patch)
tree950e3c6002244b9d229265bba1ae32767c1a3f80 /arch/s390/include/asm/cpu_mcf.h
parents390/cpum_cf: add ctr_stcctm() function (diff)
downloadlinux-dev-fe5908bccc565f85cab025695627678cf257f91e.tar.xz
linux-dev-fe5908bccc565f85cab025695627678cf257f91e.zip
s390/cpum_cf_diag: Add support for s390 counter facility diagnostic trace
Introduce a PMU device named cpum_cf_diag. It extracts the values of all counters in all authorized counter sets and stores them as event raw data. This is done with the STORE CPU COUNTER MULTIPLE instruction to speed up access. All counter sets fit into one buffer. The values of each counter are taken when the event is started on the performance sub-system and when the event is stopped. This results in counter values available at the start and at the end of the measurement time frame. The difference is calculated for each counter. The differences of all counters are then saved as event raw data in the perf.data file. The counter values are accompanied by the time stamps when the counter set was started and when the counter set was stopped. This data is part of a trailer entry which describes the time frame, counter set version numbers, CPU speed, and machine type for later analysis. Signed-off-by: Thomas Richter <tmricht@linux.ibm.com> Reviewed-by: Hendrik Brueckner <brueckner@linux.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/include/asm/cpu_mcf.h')
-rw-r--r--arch/s390/include/asm/cpu_mcf.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/s390/include/asm/cpu_mcf.h b/arch/s390/include/asm/cpu_mcf.h
index 0c236d1a7aee..649b9fc60685 100644
--- a/arch/s390/include/asm/cpu_mcf.h
+++ b/arch/s390/include/asm/cpu_mcf.h
@@ -49,6 +49,26 @@ static inline void ctr_set_stop(u64 *state, int ctr_set)
*state &= ~(cpumf_ctr_ctl[ctr_set] << CPUMF_LCCTL_ACTCTL_SHIFT);
}
+static inline void ctr_set_multiple_enable(u64 *state, u64 ctrsets)
+{
+ *state |= ctrsets << CPUMF_LCCTL_ENABLE_SHIFT;
+}
+
+static inline void ctr_set_multiple_disable(u64 *state, u64 ctrsets)
+{
+ *state &= ~(ctrsets << CPUMF_LCCTL_ENABLE_SHIFT);
+}
+
+static inline void ctr_set_multiple_start(u64 *state, u64 ctrsets)
+{
+ *state |= ctrsets << CPUMF_LCCTL_ACTCTL_SHIFT;
+}
+
+static inline void ctr_set_multiple_stop(u64 *state, u64 ctrsets)
+{
+ *state &= ~(ctrsets << CPUMF_LCCTL_ACTCTL_SHIFT);
+}
+
static inline int ctr_stcctm(enum cpumf_ctr_set set, u64 range, u64 *dest)
{
switch (set) {
@@ -97,4 +117,10 @@ static inline void kernel_cpumcf_end(void)
preempt_enable();
}
+/* Return true if store counter set multiple instruction is available */
+static inline int stccm_avail(void)
+{
+ return test_facility(142);
+}
+
#endif /* _ASM_S390_CPU_MCF_H */