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| author |   Hendrik Brueckner <brueckner@linux.vnet.ibm.com> | 2013-12-12 17:54:57 +0100 |
|---|---|---|
| committer |   Martin Schwidefsky <schwidefsky@de.ibm.com> | 2013-12-16 14:37:59 +0100 |
| commit | 443e802bab16916f9a51a34f2213f4dee6e8762c (patch) | |
| tree | 8481d35917b96ad1dfee837e52ad804e3459e018 /arch/s390/include/asm/perf_event.h | |
| parent | s390/cpum_sf: Add helper to read TOD from trailer entries (diff) | |
| download | linux-dev-443e802bab16916f9a51a34f2213f4dee6e8762c.tar.xz linux-dev-443e802bab16916f9a51a34f2213f4dee6e8762c.zip | |
s390/cpum_sf: Detect KVM guest samples
The host-program-parameter (hpp) value of basic sample-data-entries designates
a SIE control block that is set by the LPP instruction in sie64a().
Non-zero values indicate guest samples, a value of zero indicates a host sample.
For perf samples, host and guest samples are distinguished using particular
PERF_MISC_* flags. The perf layer calls perf_misc_flags() to set the flags
based on the pt_regs content. For each sample-data-entry, the cpum_sf PMU
creates a pt_regs structure with the sample-data information. An additional
flag structure is added to easily distinguish between host and guest samples.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/include/asm/perf_event.h')
| -rw-r--r-- | arch/s390/include/asm/perf_event.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/s390/include/asm/perf_event.h b/arch/s390/include/asm/perf_event.h index 99d7f4e333c2..7667bde37dcb 100644 --- a/arch/s390/include/asm/perf_event.h +++ b/arch/s390/include/asm/perf_event.h @@ -42,6 +42,12 @@ extern unsigned long perf_instruction_pointer(struct pt_regs *regs); extern unsigned long perf_misc_flags(struct pt_regs *regs); #define perf_misc_flags(regs) perf_misc_flags(regs) +/* Perf pt_regs extension for sample-data-entry indicators */ +struct perf_sf_sde_regs { + unsigned char in_guest:1; /* guest sample */ + unsigned long reserved:63; /* reserved */ +}; + /* Perf PMU definitions for the counter facility */ #define PERF_CPUM_CF_MAX_CTR 256 |