aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/drivers/dma/Kconfig
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/sh/drivers/dma/Kconfig
downloadlinux-dev-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.tar.xz
linux-dev-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.zip
Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/sh/drivers/dma/Kconfig')
-rw-r--r--arch/sh/drivers/dma/Kconfig55
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
new file mode 100644
index 000000000000..0f15216cd39d
--- /dev/null
+++ b/arch/sh/drivers/dma/Kconfig
@@ -0,0 +1,55 @@
+menu "DMA support"
+
+config SH_DMA
+ bool "DMA controller (DMAC) support"
+ help
+ Selecting this option will provide same API as PC's Direct Memory
+ Access Controller(8237A) for SuperH DMAC.
+
+ If unsure, say N.
+
+config NR_ONCHIP_DMA_CHANNELS
+ depends on SH_DMA
+ int "Number of on-chip DMAC channels"
+ default "4"
+ help
+ This allows you to specify the number of channels that the on-chip
+ DMAC supports. This will be 4 for SH7750/SH7751 and 8 for the
+ SH7750R/SH7751R.
+
+config NR_DMA_CHANNELS_BOOL
+ depends on SH_DMA
+ bool "Override default number of maximum DMA channels"
+ help
+ This allows you to forcibly update the maximum number of supported
+ DMA channels for a given board. If this is unset, this will default
+ to the number of channels that the on-chip DMAC has.
+
+config NR_DMA_CHANNELS
+ int "Maximum number of DMA channels"
+ depends on SH_DMA && NR_DMA_CHANNELS_BOOL
+ default NR_ONCHIP_DMA_CHANNELS
+ help
+ This allows you to specify the maximum number of DMA channels to
+ support. Setting this to a higher value allows for cascading DMACs
+ with additional channels.
+
+config DMA_PAGE_OPS
+ bool "Use DMAC for page copy/clear"
+ depends on SH_DMA && BROKEN
+ help
+ Selecting this option will use a dual-address mode configured channel
+ in the SH DMAC for copy_page()/clear_page(). Primarily a performance
+ hack.
+
+config DMA_PAGE_OPS_CHANNEL
+ depends on DMA_PAGE_OPS
+ int "DMA channel for sh memory-manager page copy/clear"
+ default "3"
+ help
+ This allows the specification of the dual address dma channel,
+ in case channel 3 is unavailable. On the SH4, channels 1,2, and 3
+ are dual-address capable.
+
+endmenu
+