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| author |   Matt Fleming <matt@console-pimps.org> | 2010-03-29 15:24:54 +0900 |
|---|---|---|
| committer |   Paul Mundt <lethal@linux-sh.org> | 2010-03-29 15:24:54 +0900 |
| commit | 6ae6650232ddcf2f50e8817acd63cde37cf1d093 (patch) | |
| tree | 0f60b6501f0c5efd2fdf4c997b54004bc91f3df1 /arch/sh/include/cpu-sh4 | |
| parent | sh: Enable the mmu in start_secondary() (diff) | |
| download | linux-dev-6ae6650232ddcf2f50e8817acd63cde37cf1d093.tar.xz linux-dev-6ae6650232ddcf2f50e8817acd63cde37cf1d093.zip | |
sh: tlb debugfs support.
Export the status of the utlb and itlb entries through debugfs.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/cpu-sh4')
| -rw-r--r-- | arch/sh/include/cpu-sh4/cpu/mmu_context.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h index 5963124c1d4a..2941be617a5f 100644 --- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h +++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h @@ -19,10 +19,17 @@ #define MMUCR 0xFF000010 /* MMU Control Register */ +#define MMU_TLB_ENTRY_SHIFT 8 + #define MMU_ITLB_ADDRESS_ARRAY 0xF2000000 #define MMU_ITLB_ADDRESS_ARRAY2 0xF2800000 +#define MMU_ITLB_DATA_ARRAY 0xF3000000 +#define MMU_ITLB_DATA_ARRAY2 0xF3800000 + #define MMU_UTLB_ADDRESS_ARRAY 0xF6000000 #define MMU_UTLB_ADDRESS_ARRAY2 0xF6800000 +#define MMU_UTLB_DATA_ARRAY 0xF7000000 +#define MMU_UTLB_DATA_ARRAY2 0xF7800000 #define MMU_PAGE_ASSOC_BIT 0x80 #define MMUCR_TI (1<<2) |