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| author |   Paul Mundt <lethal@linux-sh.org> | 2009-08-16 00:53:56 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2009-08-16 00:53:56 +0900 |
| commit | 65305ae816ca17a38340aef0ccc92d0c127acccf (patch) | |
| tree | eb79f5942b85e857a2b0d09271253495356d5488 /arch/sh/include/cpu-sh5 | |
| parent | sh: Kill off the unhandled pvr case in SH-4 CPU probing. (diff) | |
| download | linux-dev-65305ae816ca17a38340aef0ccc92d0c127acccf.tar.xz linux-dev-65305ae816ca17a38340aef0ccc92d0c127acccf.zip | |
sh: Convert cache disabled SH-5 over to new cache interface.
The caches enabled case needs more work, but is presently broken
regardless, so this can be done incrementally.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/cpu-sh5')
| -rw-r--r-- | arch/sh/include/cpu-sh5/cpu/cacheflush.h | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/arch/sh/include/cpu-sh5/cpu/cacheflush.h b/arch/sh/include/cpu-sh5/cpu/cacheflush.h deleted file mode 100644 index 202f637a0e17..000000000000 --- a/arch/sh/include/cpu-sh5/cpu/cacheflush.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef __ASM_SH_CPU_SH5_CACHEFLUSH_H -#define __ASM_SH_CPU_SH5_CACHEFLUSH_H - -#ifndef __ASSEMBLY__ - -extern void flush_cache_all(void); -extern void flush_cache_mm(struct mm_struct *mm); -extern void flush_cache_sigtramp(unsigned long vaddr); -extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end); -extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn); -extern void flush_dcache_page(struct page *pg); -extern void flush_icache_range(unsigned long start, unsigned long end); - -/* XXX .. */ -extern void (*__flush_wback_region)(void *start, int size); -extern void (*__flush_purge_region)(void *start, int size); -extern void (*__flush_invalidate_region)(void *start, int size); - -#define flush_cache_dup_mm(mm) flush_cache_mm(mm) -#define flush_icache_page(vma, page) do { } while (0) - -#endif /* __ASSEMBLY__ */ - -#endif /* __ASM_SH_CPU_SH5_CACHEFLUSH_H */ |