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| author |   Paul Mundt <lethal@linux-sh.org> | 2008-12-17 14:41:54 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2008-12-22 18:44:46 +0900 |
| commit | 073da9c0de401e8683b6bc76c008a7e0850045d5 (patch) | |
| tree | 7b843de420aec114f3ed497813ca9e5913d7e157 /arch/sh/include/mach-se | |
| parent | sh: Add a simple edosk7705_defconfig for build testing. (diff) | |
| download | linux-dev-073da9c0de401e8683b6bc76c008a7e0850045d5.tar.xz linux-dev-073da9c0de401e8683b6bc76c008a7e0850045d5.zip | |
sh: Kill off cf-enabler with extreme prejudice.
Now that the rest of the boards that were using cf-enabler "generically"
have switched to setting up their mappings on their own, only the mach-se
boards were left using it. All of the cf-enabler using mach-se boards
use a special initialization of the MRSHPC windows rather than going
through the special PTE as other SH-4 platforms do. This consolidates
the MRSHPC setup logic, hooks it up on the boards that care, and gets rid
of any and all remaining references to cf-enabler.
This has been long overdue, as cf-enabler has been the bane of
arch/sh/kernel for the last 7 years. Good riddance.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/mach-se')
| -rw-r--r-- | arch/sh/include/mach-se/mach/mrshpc.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/sh/include/mach-se/mach/mrshpc.h b/arch/sh/include/mach-se/mach/mrshpc.h new file mode 100644 index 000000000000..95c8b8254015 --- /dev/null +++ b/arch/sh/include/mach-se/mach/mrshpc.h @@ -0,0 +1,52 @@ +#ifndef __MACH_SE_MRSHPC_H +#define __MACH_SE_MRSHPC_H + +#include <linux/io.h> + +static void __init mrshpc_setup_windows(void) +{ + if ((__raw_readw(MRSHPC_CSR) & 0x000c) != 0) + return; /* Not detected */ + + if ((__raw_readw(MRSHPC_CSR) & 0x0080) == 0) { + __raw_writew(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */ + } else { + __raw_writew(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */ + } + + /* + * PC-Card window open + * flag == COMMON/ATTRIBUTE/IO + */ + /* common window open */ + __raw_writew(0x8a84, MRSHPC_MW0CR1); + if((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) + /* common mode & bus width 16bit SWAP = 1*/ + __raw_writew(0x0b00, MRSHPC_MW0CR2); + else + /* common mode & bus width 16bit SWAP = 0*/ + __raw_writew(0x0300, MRSHPC_MW0CR2); + + /* attribute window open */ + __raw_writew(0x8a85, MRSHPC_MW1CR1); + if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) + /* attribute mode & bus width 16bit SWAP = 1*/ + __raw_writew(0x0a00, MRSHPC_MW1CR2); + else + /* attribute mode & bus width 16bit SWAP = 0*/ + __raw_writew(0x0200, MRSHPC_MW1CR2); + + /* I/O window open */ + __raw_writew(0x8a86, MRSHPC_IOWCR1); + __raw_writew(0x0008, MRSHPC_CDCR); /* I/O card mode */ + if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) + __raw_writew(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/ + else + __raw_writew(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/ + + __raw_writew(0x2000, MRSHPC_ICR); + __raw_writeb(0x00, PA_MRSHPC_MW2 + 0x206); + __raw_writeb(0x42, PA_MRSHPC_MW2 + 0x200); +} + +#endif /* __MACH_SE_MRSHPC_H */ |