path: root/arch/sh/kernel/cpu/sh2/entry.S
diff options
authorRich Felker <dalias@libc.org>2016-03-17 23:09:37 +0000
committerRich Felker <dalias@libc.org>2016-08-05 03:29:31 +0000
commit5a846abad07f6f30adfa3e46c5c7a47d2e7b1e63 (patch)
treefc16a7c8f74a2010f0134ef3e69d20fde929bc08 /arch/sh/kernel/cpu/sh2/entry.S
parentsh: fix build regression with CONFIG_OF && !CONFIG_OF_FLATTREE (diff)
sh: add support for J-Core J2 processor
At the CPU/ISA level, the J2 is compatible with SH-2, and thus the changes to add J2 support build on existing SH-2 support. However, J2 does not duplicate the memory-mapped SH-2 features like the cache interface. Instead, the cache interfaces is described in the device tree, and new code is added to be able to access the flat device tree at early boot before it is unflattened. Support is also added for receiving interrupts on trap numbers in the range 16 to 31, since the J-Core aic1 interrupt controller generates these traps. This range was unused but nominally for hardware exceptions on SH-2, and a few values in this range were used for exceptions on SH-2A, but SH-2A has its own version of the relevant code. No individual cpu subtypes are added for J2 since the intent moving forward is to represent SoCs with device tree rather than as hard-coded subtypes in the kernel. The CPU_SUBTYPE_J2 Kconfig item exists only to fit into the existing cpu selection mechanism until it is overhauled. Signed-off-by: Rich Felker <dalias@libc.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh2/entry.S')
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh2/entry.S b/arch/sh/kernel/cpu/sh2/entry.S
index a1505956ef28..16bde0efaca3 100644
--- a/arch/sh/kernel/cpu/sh2/entry.S
+++ b/arch/sh/kernel/cpu/sh2/entry.S
@@ -147,6 +147,11 @@ ENTRY(exception_handler)
mov #31,r8
cmp/hs r8,r9
bt trap_entry ! 64 > vec >= 31 is trap
+#ifdef CONFIG_CPU_J2
+ mov #16,r8
+ cmp/hs r8,r9
+ bt interrupt_entry ! 31 > vec >= 16 is interrupt
mov.l 4f,r8
mov r9,r4