diff options
| author |   Arnd Bergmann <arnd@arndb.de> | 2022-08-02 16:09:12 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2022-08-02 16:09:13 +0200 |
| commit | 0d98fbcf72f11b6a6fadcec16d4c7f317bf417ae (patch) | |
| tree | 6018107f42bed383f7416e9d7309a92c737feb34 /arch/sh/kernel/irq.c | |
| parent | Merge tag 'asahi-soc-dt-5.20' of https://github.com/AsahiLinux/linux into arm/late (diff) | |
| parent | ARM: dts: add EMAC AXI settings for Cyclone5 (diff) | |
| download | linux-dev-0d98fbcf72f11b6a6fadcec16d4c7f317bf417ae.tar.xz linux-dev-0d98fbcf72f11b6a6fadcec16d4c7f317bf417ae.zip | |
Merge tag 'socfpga_updates_for_v5.20_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/late
SoCFPGA dts updates for v5.20, part 2
- Update EMAC AXI settings for Cyclone5
* tag 'socfpga_updates_for_v5.20_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: add EMAC AXI settings for Cyclone5
arm64: dts: altera: socfpga_stratix10: move clocks out of soc node
arm64: dts: Add support for Stratix 10 Software Virtual Platform
dt-bindings: altera: document Stratix 10 SWVP compatibles
arm64: dts: altera: adjust whitespace around '='
arm64: dts: intel: socfpga_agilex: use defined GIC interrupt type for ECC
dt-bindings: altera: Add Chameleon v3 board
ARM: dts: socfpga: Add Google Chameleon v3 devicetree
ARM: dts: socfpga: Add atsha204a node to Mercury+ AA1 dts
ARM: dts: socfpga: Move sdmmc-ecc node to Arria 10 dts
ARM: dts: socfpga: Change Mercury+ AA1 dts to dtsi
Link: https://lore.kernel.org/r/20220728223237.3184243-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/sh/kernel/irq.c')
0 files changed, 0 insertions, 0 deletions