|author||Stuart Menefy <email@example.com>||2007-11-30 17:06:36 +0900|
|committer||Paul Mundt <firstname.lastname@example.org>||2008-01-28 13:18:59 +0900|
|parent||sh: Explicit alignment for PAGE_SIZE in copy/clear_page(). (diff)|
sh: Preparation for uncached jumps through PMB.
Presently most of the 29-bit physical parts do P1/P2 segmentation with a 1:1 cached/uncached mapping, jumping between the two to control the caching behaviour. This provides the basic infrastructure to maintain this behaviour on 32-bit physical parts that don't map P1/P2 at all, using a shiny new linker section and corresponding fixmap entry. Signed-off-by: Stuart Menefy <email@example.com> Signed-off-by: Paul Mundt <firstname.lastname@example.org>
Diffstat (limited to 'arch/sh/kernel/setup.c')
0 files changed, 0 insertions, 0 deletions