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| author |   Paul Mundt <lethal@linux-sh.org> | 2007-11-10 20:27:03 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2008-01-28 13:18:44 +0900 |
| commit | 256b22ca66987c537064dc25b0b267966189b5ba (patch) | |
| tree | 482f095562a3e1614b67de5352f09d4feea673f1 /arch/sh/kernel/traps_64.c | |
| parent | sh: Disable initial cache flush on SH-5. (diff) | |
| download | linux-dev-256b22ca66987c537064dc25b0b267966189b5ba.tar.xz linux-dev-256b22ca66987c537064dc25b0b267966189b5ba.zip | |
sh: Have SH-5 provide an {en,dis}able_fpu() impl.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/traps_64.c')
| -rw-r--r-- | arch/sh/kernel/traps_64.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c index 742ce18b6820..0f4ea3ac3e0b 100644 --- a/arch/sh/kernel/traps_64.c +++ b/arch/sh/kernel/traps_64.c @@ -617,9 +617,9 @@ static int misaligned_fpu_load(struct pt_regs *regs, context switch the registers into memory so they can be indexed by register number. */ if (last_task_used_math == current) { - grab_fpu(); + enable_fpu(); fpsave(¤t->thread.fpu.hard); - release_fpu(); + disable_fpu(); last_task_used_math = NULL; regs->sr |= SR_FD; } @@ -690,9 +690,9 @@ static int misaligned_fpu_store(struct pt_regs *regs, context switch the registers into memory so they can be indexed by register number. */ if (last_task_used_math == current) { - grab_fpu(); + enable_fpu(); fpsave(¤t->thread.fpu.hard); - release_fpu(); + disable_fpu(); last_task_used_math = NULL; regs->sr |= SR_FD; } |