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author | Thomas Gleixner <tglx@linutronix.de> | 2013-08-21 14:44:54 +0200 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2013-08-21 14:44:54 +0200 |
commit | fac778a2b8d6ca953d440baeee72901c2dd5aad9 (patch) | |
tree | c43d780b5ff8819f4353b16c99601c5ceeeacad7 /arch/sh/mm/tlb-sh5.c | |
parent | ARM: clocksource: Add support for MOXA ART SoCs (diff) | |
parent | proc: return on proc_readdir error (diff) | |
download | linux-dev-fac778a2b8d6ca953d440baeee72901c2dd5aad9.tar.xz linux-dev-fac778a2b8d6ca953d440baeee72901c2dd5aad9.zip |
Merge branch 'linus' into timers/core
Reason: Get upstream changes on which new patches depend on.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/sh/mm/tlb-sh5.c')
-rw-r--r-- | arch/sh/mm/tlb-sh5.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/mm/tlb-sh5.c b/arch/sh/mm/tlb-sh5.c index ff1c40a31cbc..e4bb2a8e0a69 100644 --- a/arch/sh/mm/tlb-sh5.c +++ b/arch/sh/mm/tlb-sh5.c @@ -17,7 +17,7 @@ /** * sh64_tlb_init - Perform initial setup for the DTLB and ITLB. */ -int __cpuinit sh64_tlb_init(void) +int sh64_tlb_init(void) { /* Assign some sane DTLB defaults */ cpu_data->dtlb.entries = 64; |