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| author |   Paul Mundt <lethal@linux-sh.org> | 2010-04-13 14:43:03 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2010-04-13 14:43:03 +0900 |
| commit | 43b8774dc409ea5d9369b978e2e7bc79289f0522 (patch) | |
| tree | 13aa346ff8f30786e8ce3ccfdd8341d182ce4c87 /arch/sh | |
| parent | sh: intc: Tidy up loglevel mismatches. (diff) | |
| download | linux-dev-43b8774dc409ea5d9369b978e2e7bc79289f0522.tar.xz linux-dev-43b8774dc409ea5d9369b978e2e7bc79289f0522.zip | |
sh: intc: userimask support.
This adds support for hardware-assisted userspace irq masking for
special priority levels. Due to the SR.IMASK interactivity, only some
platforms implement this in hardware (including but not limited to
SH-4A interrupt controllers, and ARM-based SH-Mobile CPUs). Each CPU
needs to wire this up on its own, for now only SH7786 is wired up as an
example.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
| -rw-r--r-- | arch/sh/Kconfig | 2 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7786.c | 3 |
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 8d90564c2bcf..ba86bfba95ac 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -732,6 +732,8 @@ config GUSA_RB LLSC, this should be more efficient than the other alternative of disabling interrupts around the atomic sequence. +source "drivers/sh/Kconfig" + endmenu menu "Boot options" diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c index 61e549190873..235edf8065df 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c @@ -21,6 +21,7 @@ #include <linux/mm.h> #include <linux/dma-mapping.h> #include <linux/sh_timer.h> +#include <linux/sh_intc.h> #include <cpu/dma-register.h> #include <asm/mmzone.h> #include <asm/dmaengine.h> @@ -907,6 +908,7 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7786-irl4567", vectors_irl4567, #define INTC_INTMSK2 INTMSK2 #define INTC_INTMSKCLR1 CnINTMSKCLR1 #define INTC_INTMSKCLR2 INTMSKCLR2 +#define INTC_USERIMASK 0xfe411000 void __init plat_irq_setup(void) { @@ -921,6 +923,7 @@ void __init plat_irq_setup(void) __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); register_intc_controller(&intc_desc); + register_intc_userimask(INTC_USERIMASK); } void __init plat_irq_setup_pins(int mode) |