aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sparc/include/asm/pgtable_64.h
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2014-05-23 15:41:52 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2014-05-23 15:41:52 -0700
commit1ee1ceafb572f1a925809168267a7962a4289de8 (patch)
tree101746dc9edf09d32ac9b24b91f2491bc06bf74b /arch/sparc/include/asm/pgtable_64.h
parentMerge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net (diff)
parentsparc64: fix format string mismatch in arch/sparc/kernel/sysfs.c (diff)
downloadlinux-dev-1ee1ceafb572f1a925809168267a7962a4289de8.tar.xz
linux-dev-1ee1ceafb572f1a925809168267a7962a4289de8.zip
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
Pull sparc fixes from David Miller: "A small bunch of bug fixes, in particular: 1) On older cpus we need a different chunk of virtual address space to map the huge page TSB. 2) Missing memory barrier in Niagara2 memcpy. 3) trinity showed some places where fault validation was unnecessarily loud on sparc64 4) Some sysfs printf's need a type adjustment, from Toralf Förster" * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: sparc64: fix format string mismatch in arch/sparc/kernel/sysfs.c sparc64: Add membar to Niagara2 memcpy code. sparc64: Fix huge TSB mapping on pre-UltraSPARC-III cpus. sparc64: Don't bark so loudly about 32-bit tasks generating 64-bit fault addresses.
Diffstat (limited to 'arch/sparc/include/asm/pgtable_64.h')
-rw-r--r--arch/sparc/include/asm/pgtable_64.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h
index fde5abaac0cc..1a49ffdf9da9 100644
--- a/arch/sparc/include/asm/pgtable_64.h
+++ b/arch/sparc/include/asm/pgtable_64.h
@@ -24,7 +24,8 @@
/* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB).
* The page copy blockops can use 0x6000000 to 0x8000000.
- * The TSB is mapped in the 0x8000000 to 0xa000000 range.
+ * The 8K TSB is mapped in the 0x8000000 to 0x8400000 range.
+ * The 4M TSB is mapped in the 0x8400000 to 0x8800000 range.
* The PROM resides in an area spanning 0xf0000000 to 0x100000000.
* The vmalloc area spans 0x100000000 to 0x200000000.
* Since modules need to be in the lowest 32-bits of the address space,
@@ -33,7 +34,8 @@
* 0x400000000.
*/
#define TLBTEMP_BASE _AC(0x0000000006000000,UL)
-#define TSBMAP_BASE _AC(0x0000000008000000,UL)
+#define TSBMAP_8K_BASE _AC(0x0000000008000000,UL)
+#define TSBMAP_4M_BASE _AC(0x0000000008400000,UL)
#define MODULES_VADDR _AC(0x0000000010000000,UL)
#define MODULES_LEN _AC(0x00000000e0000000,UL)
#define MODULES_END _AC(0x00000000f0000000,UL)