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| author |   David S. Miller <davem@davemloft.net> | 2006-01-31 18:31:20 -0800 |
|---|---|---|
| committer |   David S. Miller <davem@sunset.davemloft.net> | 2006-03-20 01:11:17 -0800 |
| commit | 98c5584cfc47932c4f3ccf5eee2e0bae1447b85e (patch) | |
| tree | c067ac8bfc081bbe0b3073374cb15708458e04ab /arch/sparc64/kernel/process.c | |
| parent | [SPARC64]: TSB refinements. (diff) | |
| download | linux-dev-98c5584cfc47932c4f3ccf5eee2e0bae1447b85e.tar.xz linux-dev-98c5584cfc47932c4f3ccf5eee2e0bae1447b85e.zip | |
[SPARC64]: Add infrastructure for dynamic TSB sizing.
This also cleans up tsb_context_switch(). The assembler
routine is now __tsb_context_switch() and the former is
an inline function that picks out the bits from the mm_struct
and passes it into the assembler code as arguments.
setup_tsb_parms() computes the locked TLB entry to map the
TSB. Later when we support using the physical address quad
load instructions of Cheetah+ and later, we'll simply use
the physical address for the TSB register value and set
the map virtual and PTE both to zero.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/process.c')
| -rw-r--r-- | arch/sparc64/kernel/process.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/sparc64/kernel/process.c b/arch/sparc64/kernel/process.c index 2784aab0d3e5..26548fc604b6 100644 --- a/arch/sparc64/kernel/process.c +++ b/arch/sparc64/kernel/process.c @@ -441,8 +441,7 @@ void flush_thread(void) mm = t->task->mm; if (mm) - tsb_context_switch(__pa(mm->pgd), - mm->context.sparc64_tsb); + tsb_context_switch(mm); set_thread_wsaved(0); |