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authorLinus Torvalds <torvalds@linux-foundation.org>2018-04-02 20:20:12 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2018-04-02 20:20:12 -0700
commitf5a8eb632b562bd9c16c389f5db3a5260fba4157 (patch)
tree82687234d772ff8f72a31e598fe16553885c56c9 /arch/tile/include/asm/pgalloc.h
parentMerge tag 'nds32-for-linus-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/greentime/linux (diff)
parentMAINTAINERS: UNICORE32: Change email account (diff)
downloadlinux-dev-f5a8eb632b562bd9c16c389f5db3a5260fba4157.tar.xz
linux-dev-f5a8eb632b562bd9c16c389f5db3a5260fba4157.zip
Merge tag 'arch-removal' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic
Pul removal of obsolete architecture ports from Arnd Bergmann: "This removes the entire architecture code for blackfin, cris, frv, m32r, metag, mn10300, score, and tile, including the associated device drivers. I have been working with the (former) maintainers for each one to ensure that my interpretation was right and the code is definitely unused in mainline kernels. Many had fond memories of working on the respective ports to start with and getting them included in upstream, but also saw no point in keeping the port alive without any users. In the end, it seems that while the eight architectures are extremely different, they all suffered the same fate: There was one company in charge of an SoC line, a CPU microarchitecture and a software ecosystem, which was more costly than licensing newer off-the-shelf CPU cores from a third party (typically ARM, MIPS, or RISC-V). It seems that all the SoC product lines are still around, but have not used the custom CPU architectures for several years at this point. In contrast, CPU instruction sets that remain popular and have actively maintained kernel ports tend to all be used across multiple licensees. [ See the new nds32 port merged in the previous commit for the next generation of "one company in charge of an SoC line, a CPU microarchitecture and a software ecosystem" - Linus ] The removal came out of a discussion that is now documented at https://lwn.net/Articles/748074/. Unlike the original plans, I'm not marking any ports as deprecated but remove them all at once after I made sure that they are all unused. Some architectures (notably tile, mn10300, and blackfin) are still being shipped in products with old kernels, but those products will never be updated to newer kernel releases. After this series, we still have a few architectures without mainline gcc support: - unicore32 and hexagon both have very outdated gcc releases, but the maintainers promised to work on providing something newer. At least in case of hexagon, this will only be llvm, not gcc. - openrisc, risc-v and nds32 are still in the process of finishing their support or getting it added to mainline gcc in the first place. They all have patched gcc-7.3 ports that work to some degree, but complete upstream support won't happen before gcc-8.1. Csky posted their first kernel patch set last week, their situation will be similar [ Palmer Dabbelt points out that RISC-V support is in mainline gcc since gcc-7, although gcc-7.3.0 is the recommended minimum - Linus ]" This really says it all: 2498 files changed, 95 insertions(+), 467668 deletions(-) * tag 'arch-removal' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: (74 commits) MAINTAINERS: UNICORE32: Change email account staging: iio: remove iio-trig-bfin-timer driver tty: hvc: remove tile driver tty: remove bfin_jtag_comm and hvc_bfin_jtag drivers serial: remove tile uart driver serial: remove m32r_sio driver serial: remove blackfin drivers serial: remove cris/etrax uart drivers usb: Remove Blackfin references in USB support usb: isp1362: remove blackfin arch glue usb: musb: remove blackfin port usb: host: remove tilegx platform glue pwm: remove pwm-bfin driver i2c: remove bfin-twi driver spi: remove blackfin related host drivers watchdog: remove bfin_wdt driver can: remove bfin_can driver mmc: remove bfin_sdh driver input: misc: remove blackfin rotary driver input: keyboard: remove bf54x driver ...
Diffstat (limited to 'arch/tile/include/asm/pgalloc.h')
-rw-r--r--arch/tile/include/asm/pgalloc.h164
1 files changed, 0 insertions, 164 deletions
diff --git a/arch/tile/include/asm/pgalloc.h b/arch/tile/include/asm/pgalloc.h
deleted file mode 100644
index 1b902508b664..000000000000
--- a/arch/tile/include/asm/pgalloc.h
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- * Copyright 2010 Tilera Corporation. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation, version 2.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT. See the GNU General Public License for
- * more details.
- */
-
-#ifndef _ASM_TILE_PGALLOC_H
-#define _ASM_TILE_PGALLOC_H
-
-#include <linux/threads.h>
-#include <linux/mm.h>
-#include <linux/mmzone.h>
-#include <asm/fixmap.h>
-#include <asm/page.h>
-#include <hv/hypervisor.h>
-
-/* Bits for the size of the second-level page table. */
-#define L2_KERNEL_PGTABLE_SHIFT _HV_LOG2_L2_SIZE(HPAGE_SHIFT, PAGE_SHIFT)
-
-/* How big is a kernel L2 page table? */
-#define L2_KERNEL_PGTABLE_SIZE (1UL << L2_KERNEL_PGTABLE_SHIFT)
-
-/* We currently allocate user L2 page tables by page (unlike kernel L2s). */
-#if L2_KERNEL_PGTABLE_SHIFT < PAGE_SHIFT
-#define L2_USER_PGTABLE_SHIFT PAGE_SHIFT
-#else
-#define L2_USER_PGTABLE_SHIFT L2_KERNEL_PGTABLE_SHIFT
-#endif
-
-/* How many pages do we need, as an "order", for a user L2 page table? */
-#define L2_USER_PGTABLE_ORDER (L2_USER_PGTABLE_SHIFT - PAGE_SHIFT)
-
-static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
-{
-#ifdef CONFIG_64BIT
- set_pte(pmdp, pmd);
-#else
- set_pte(&pmdp->pud.pgd, pmd.pud.pgd);
-#endif
-}
-
-static inline void pmd_populate_kernel(struct mm_struct *mm,
- pmd_t *pmd, pte_t *ptep)
-{
- set_pmd(pmd, ptfn_pmd(HV_CPA_TO_PTFN(__pa(ptep)),
- __pgprot(_PAGE_PRESENT)));
-}
-
-static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
- pgtable_t page)
-{
- set_pmd(pmd, ptfn_pmd(HV_CPA_TO_PTFN(PFN_PHYS(page_to_pfn(page))),
- __pgprot(_PAGE_PRESENT)));
-}
-
-/*
- * Allocate and free page tables.
- */
-
-extern pgd_t *pgd_alloc(struct mm_struct *mm);
-extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
-
-extern pgtable_t pgtable_alloc_one(struct mm_struct *mm, unsigned long address,
- int order);
-extern void pgtable_free(struct mm_struct *mm, struct page *pte, int order);
-
-static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
- unsigned long address)
-{
- return pgtable_alloc_one(mm, address, L2_USER_PGTABLE_ORDER);
-}
-
-static inline void pte_free(struct mm_struct *mm, struct page *pte)
-{
- pgtable_free(mm, pte, L2_USER_PGTABLE_ORDER);
-}
-
-#define pmd_pgtable(pmd) pmd_page(pmd)
-
-static inline pte_t *
-pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
-{
- return pfn_to_kaddr(page_to_pfn(pte_alloc_one(mm, address)));
-}
-
-static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
-{
- BUG_ON((unsigned long)pte & (PAGE_SIZE-1));
- pte_free(mm, virt_to_page(pte));
-}
-
-extern void __pgtable_free_tlb(struct mmu_gather *tlb, struct page *pte,
- unsigned long address, int order);
-static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte,
- unsigned long address)
-{
- __pgtable_free_tlb(tlb, pte, address, L2_USER_PGTABLE_ORDER);
-}
-
-#define check_pgt_cache() do { } while (0)
-
-/*
- * Get the small-page pte_t lowmem entry for a given pfn.
- * This may or may not be in use, depending on whether the initial
- * huge-page entry for the page has already been shattered.
- */
-pte_t *get_prealloc_pte(unsigned long pfn);
-
-/* During init, we can shatter kernel huge pages if needed. */
-void shatter_pmd(pmd_t *pmd);
-
-/* After init, a more complex technique is required. */
-void shatter_huge_page(unsigned long addr);
-
-#ifdef __tilegx__
-
-#define pud_populate(mm, pud, pmd) \
- pmd_populate_kernel((mm), (pmd_t *)(pud), (pte_t *)(pmd))
-
-/* Bits for the size of the L1 (intermediate) page table. */
-#define L1_KERNEL_PGTABLE_SHIFT _HV_LOG2_L1_SIZE(HPAGE_SHIFT)
-
-/* How big is a kernel L2 page table? */
-#define L1_KERNEL_PGTABLE_SIZE (1UL << L1_KERNEL_PGTABLE_SHIFT)
-
-/* We currently allocate L1 page tables by page. */
-#if L1_KERNEL_PGTABLE_SHIFT < PAGE_SHIFT
-#define L1_USER_PGTABLE_SHIFT PAGE_SHIFT
-#else
-#define L1_USER_PGTABLE_SHIFT L1_KERNEL_PGTABLE_SHIFT
-#endif
-
-/* How many pages do we need, as an "order", for an L1 page table? */
-#define L1_USER_PGTABLE_ORDER (L1_USER_PGTABLE_SHIFT - PAGE_SHIFT)
-
-static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
-{
- struct page *p = pgtable_alloc_one(mm, address, L1_USER_PGTABLE_ORDER);
- return (pmd_t *)page_to_virt(p);
-}
-
-static inline void pmd_free(struct mm_struct *mm, pmd_t *pmdp)
-{
- pgtable_free(mm, virt_to_page(pmdp), L1_USER_PGTABLE_ORDER);
-}
-
-static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
- unsigned long address)
-{
- __pgtable_free_tlb(tlb, virt_to_page(pmdp), address,
- L1_USER_PGTABLE_ORDER);
-}
-
-#endif /* __tilegx__ */
-
-#endif /* _ASM_TILE_PGALLOC_H */