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| author |   Chris Metcalf <cmetcalf@tilera.com> | 2013-08-15 16:23:24 -0400 |
|---|---|---|
| committer | Chris Metcalf <cmetcalf@tilera.com> | 2013-09-03 14:53:29 -0400 |
| commit | d7c9661115fd23b4dabb710b3080dd9919dfa891 (patch) | |
| tree | 5eaeb8c4aab296f39d6aa896ec9408419ec17441 /arch/tile/include/asm/smp.h | |
| parent | tile: use asm-generic/bitops/builtin-*.h (diff) | |
| download | linux-dev-d7c9661115fd23b4dabb710b3080dd9919dfa891.tar.xz linux-dev-d7c9661115fd23b4dabb710b3080dd9919dfa891.zip | |
tile: remove support for TILE64
This chip is no longer being actively developed for (it was superceded
by the TILEPro64 in 2008), and in any case the existing compiler and
toolchain in the community do not support it. It's unlikely that the
kernel works with TILE64 at this point as the configuration has not been
tested in years. The support is also awkward as it requires maintaining
a significant number of ifdefs. So, just remove it altogether.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/include/asm/smp.h')
| -rw-r--r-- | arch/tile/include/asm/smp.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/tile/include/asm/smp.h b/arch/tile/include/asm/smp.h index 1aa759aeb5b3..9a326b64f7ae 100644 --- a/arch/tile/include/asm/smp.h +++ b/arch/tile/include/asm/smp.h @@ -101,10 +101,8 @@ void print_disabled_cpus(void); extern struct cpumask cpu_lotar_map; #define cpu_is_valid_lotar(cpu) cpumask_test_cpu((cpu), &cpu_lotar_map) -#if CHIP_HAS_CBOX_HOME_MAP() /* Which processors are used for hash-for-home mapping */ extern struct cpumask hash_for_home_map; -#endif /* Which cpus can have their cache flushed by hv_flush_remote(). */ extern struct cpumask cpu_cacheable_map; |