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| author |   Chris Metcalf <cmetcalf@tilera.com> | 2013-09-26 13:24:53 -0400 |
|---|---|---|
| committer | Chris Metcalf <cmetcalf@tilera.com> | 2013-09-30 10:34:41 -0400 |
| commit | f862eefec0b68e099a9fa58d3761ffb10bad97e1 (patch) | |
| tree | e82f50d999230deac554c91de5665a6475836243 /arch/tile/kernel/stack.c | |
| parent | tile: ensure interrupts disabled for preempt_schedule_irq() (diff) | |
| download | linux-dev-f862eefec0b68e099a9fa58d3761ffb10bad97e1.tar.xz linux-dev-f862eefec0b68e099a9fa58d3761ffb10bad97e1.zip | |
tile: use a more conservative __my_cpu_offset in CONFIG_PREEMPT
It turns out the kernel relies on barrier() to force a reload of the
percpu offset value. Since we can't easily modify the definition of
barrier() to include "tp" as an output register, we instead provide a
definition of __my_cpu_offset as extended assembly that includes a fake
stack read to hazard against barrier(), forcing gcc to know that it
must reread "tp" and recompute anything based on "tp" after a barrier.
This fixes observed hangs in the slub allocator when we are looping
on a percpu cmpxchg_double.
A similar fix for ARMv7 was made in June in change 509eb76ebf97.
Cc: stable@vger.kernel.org
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/kernel/stack.c')
0 files changed, 0 insertions, 0 deletions