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| author |   Kirill A. Shutemov <kirill.shutemov@linux.intel.com> | 2018-02-14 21:25:42 +0300 |
|---|---|---|
| committer |   Ingo Molnar <mingo@kernel.org> | 2018-02-16 10:48:49 +0100 |
| commit | 6657fca06e3ffab8d0b3f9d8b397f5ee498952d7 (patch) | |
| tree | 974d247b3c7459a2d595cc837d69ab84f57913a5 /arch/x86/Kconfig | |
| parent | x86/mm: Replace compile-time checks for 5-level paging with runtime-time checks (diff) | |
| download | linux-dev-6657fca06e3ffab8d0b3f9d8b397f5ee498952d7.tar.xz linux-dev-6657fca06e3ffab8d0b3f9d8b397f5ee498952d7.zip | |
x86/mm: Allow to boot without LA57 if CONFIG_X86_5LEVEL=y
All pieces of the puzzle are in place and we can now allow to boot with
CONFIG_X86_5LEVEL=y on a machine without LA57 support.
Kernel will detect that LA57 is missing and fold p4d at runtime.
Update the documentation and the Kconfig option description to reflect the
change.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20180214182542.69302-10-kirill.shutemov@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/Kconfig')
| -rw-r--r-- | arch/x86/Kconfig | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index fcc3f88996b3..1c4f7b6a94f4 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1440,8 +1440,8 @@ config X86_5LEVEL It will be supported by future Intel CPUs. - Note: a kernel with this option enabled can only be booted - on machines that support the feature. + A kernel with the option enabled can be booted on machines that + support 4- or 5-level paging. See Documentation/x86/x86_64/5level-paging.txt for more information. |