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authorFenghua Yu <fenghua.yu@intel.com>2020-09-15 09:30:13 -0700
committerBorislav Petkov <bp@suse.de>2020-09-17 20:22:15 +0200
commit20f0afd1fb3d7d44f4a3db5a4b6e904410862140 (patch)
tree0a2b714214912ec3feecdd2193d0df3e51ea7851 /arch/x86/include/asm/fpu/internal.h
parentx86/cpufeatures: Mark ENQCMD as disabled when configured out (diff)
downloadlinux-dev-20f0afd1fb3d7d44f4a3db5a4b6e904410862140.tar.xz
linux-dev-20f0afd1fb3d7d44f4a3db5a4b6e904410862140.zip
x86/mmu: Allocate/free a PASID
A PASID is allocated for an "mm" the first time any thread binds to an SVA-capable device and is freed from the "mm" when the SVA is unbound by the last thread. It's possible for the "mm" to have different PASID values in different binding/unbinding SVA cycles. The mm's PASID (non-zero for valid PASID or 0 for invalid PASID) is propagated to a per-thread PASID MSR for all threads within the mm through IPI, context switch, or inherited. This is done to ensure that a running thread has the right PASID in the MSR matching the mm's PASID. [ bp: s/SVM/SVA/g; massage. ] Suggested-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Tony Luck <tony.luck@intel.com> Link: https://lkml.kernel.org/r/1600187413-163670-10-git-send-email-fenghua.yu@intel.com
Diffstat (limited to 'arch/x86/include/asm/fpu/internal.h')
-rw-r--r--arch/x86/include/asm/fpu/internal.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index 0a460f2a3f90..341d00eba3f8 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -583,6 +583,13 @@ static inline void switch_fpu_finish(struct fpu *new_fpu)
pkru_val = pk->pkru;
}
__write_pkru(pkru_val);
+
+ /*
+ * Expensive PASID MSR write will be avoided in update_pasid() because
+ * TIF_NEED_FPU_LOAD was set. And the PASID state won't be updated
+ * unless it's different from mm->pasid to reduce overhead.
+ */
+ update_pasid();
}
/*