diff options
| author |   Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2021-01-25 21:39:46 +0200 |
|---|---|---|
| committer |   Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2021-02-09 15:28:37 +0100 |
| commit | 2468f933b14ed49f15562cdb02bd2592a0aa8248 (patch) | |
| tree | 5a3420d9cc419cda5d216b477958915167a31137 /arch/x86/include/asm/intel-mid.h | |
| parent | x86/platform/intel-mid: Remove unused leftovers (msic) (diff) | |
| download | linux-dev-2468f933b14ed49f15562cdb02bd2592a0aa8248.tar.xz linux-dev-2468f933b14ed49f15562cdb02bd2592a0aa8248.zip | |
x86/platform/intel-mid: Remove unused leftovers (vRTC)
There is no driver present, remove the device creation and other
leftovers.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'arch/x86/include/asm/intel-mid.h')
| -rw-r--r-- | arch/x86/include/asm/intel-mid.h | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/arch/x86/include/asm/intel-mid.h b/arch/x86/include/asm/intel-mid.h index e68ae2155db3..9a6f8b1bebcd 100644 --- a/arch/x86/include/asm/intel-mid.h +++ b/arch/x86/include/asm/intel-mid.h @@ -23,10 +23,7 @@ extern void intel_mid_pwr_power_off(void); extern int intel_mid_pwr_get_lss_id(struct pci_dev *pdev); extern int get_gpio_by_name(const char *name); -extern int __init sfi_parse_mrtc(struct sfi_table_header *table); extern int __init sfi_parse_mtmr(struct sfi_table_header *table); -extern int sfi_mrtc_num; -extern struct sfi_rtc_table_entry sfi_mrtc_array[]; /* * Here defines the array of devices platform data that IAFW would export @@ -112,13 +109,6 @@ extern enum intel_mid_timer_options intel_mid_timer_options; #define BSEL_SOC_FUSE_111 0x7 #define SFI_MTMR_MAX_NUM 8 -#define SFI_MRTC_MAX 8 - -/* VRTC timer */ -#define MRST_VRTC_MAP_SZ 1024 -/* #define MRST_VRTC_PGOFFSET 0xc00 */ - -extern void intel_mid_rtc_init(void); /* The offset for the mapping of global gpio pin to irq */ #define INTEL_MID_IRQ_OFFSET 0x100 |