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authorLuwei Kang <luwei.kang@intel.com>2018-10-24 16:05:09 +0800
committerPaolo Bonzini <pbonzini@redhat.com>2018-12-21 11:28:33 +0100
commite0018afec50a4846789d92a1b7cd6cd7f816c448 (patch)
treedfb792719c9c40b038ee553e2592dc87b90a2108 /arch/x86/include/asm/intel_pt.h
parentperf/x86/intel/pt: Add new bit definitions for PT MSRs (diff)
downloadlinux-dev-e0018afec50a4846789d92a1b7cd6cd7f816c448.tar.xz
linux-dev-e0018afec50a4846789d92a1b7cd6cd7f816c448.zip
perf/x86/intel/pt: add new capability for Intel PT
This adds support for "output to Trace Transport subsystem" capability of Intel PT. It means that PT can output its trace to an MMIO address range rather than system memory buffer. Acked-by: Song Liu <songliubraving@fb.com> Signed-off-by: Luwei Kang <luwei.kang@intel.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/include/asm/intel_pt.h')
-rw-r--r--arch/x86/include/asm/intel_pt.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/intel_pt.h b/arch/x86/include/asm/intel_pt.h
index 00f4afb2b7de..634f99b1dc22 100644
--- a/arch/x86/include/asm/intel_pt.h
+++ b/arch/x86/include/asm/intel_pt.h
@@ -16,6 +16,7 @@ enum pt_capabilities {
PT_CAP_topa_output,
PT_CAP_topa_multiple_entries,
PT_CAP_single_range_output,
+ PT_CAP_output_subsys,
PT_CAP_payloads_lip,
PT_CAP_num_address_ranges,
PT_CAP_mtc_periods,