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author | James Morris <jmorris@namei.org> | 2009-05-08 17:56:47 +1000 |
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committer | James Morris <jmorris@namei.org> | 2009-05-08 17:56:47 +1000 |
commit | d254117099d711f215e62427f55dfb8ebd5ad011 (patch) | |
tree | 0848ff8dd74314fec14a86497f8d288c86ba7c65 /arch/x86/include/asm/msr-index.h | |
parent | integrity: remove __setup auditing msgs (diff) | |
parent | NOMMU: Don't check vm_region::vm_start is page aligned in add_nommu_region() (diff) | |
download | linux-dev-d254117099d711f215e62427f55dfb8ebd5ad011.tar.xz linux-dev-d254117099d711f215e62427f55dfb8ebd5ad011.zip |
Merge branch 'master' into next
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
-rw-r--r-- | arch/x86/include/asm/msr-index.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index f4e505f286bc..ec41fc16c167 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -81,6 +81,11 @@ #define MSR_IA32_MC0_ADDR 0x00000402 #define MSR_IA32_MC0_MISC 0x00000403 +/* These are consecutive and not in the normal 4er MCE bank block */ +#define MSR_IA32_MC0_CTL2 0x00000280 +#define CMCI_EN (1ULL << 30) +#define CMCI_THRESHOLD_MASK 0xffffULL + #define MSR_P6_PERFCTR0 0x000000c1 #define MSR_P6_PERFCTR1 0x000000c2 #define MSR_P6_EVNTSEL0 0x00000186 |