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authorH. Peter Anvin <hpa@zytor.com>2016-06-08 12:38:38 -0700
committerH. Peter Anvin <hpa@linux.intel.com>2016-06-08 12:41:20 -0700
commit117780eef7740729e803bdcc0d5f2f48137ea8e3 (patch)
tree63bd519e1d8b115d332fcb6e63ee4f94ee235161 /arch/x86/include/asm/rmwcc.h
parentx86, bitops: remove use of "sbb" to return CF (diff)
downloadlinux-dev-117780eef7740729e803bdcc0d5f2f48137ea8e3.tar.xz
linux-dev-117780eef7740729e803bdcc0d5f2f48137ea8e3.zip
x86, asm: use bool for bitops and other assembly outputs
The gcc people have confirmed that using "bool" when combined with inline assembly always is treated as a byte-sized operand that can be assumed to be 0 or 1, which is exactly what the SET instruction emits. Change the output types and intermediate variables of as many operations as practical to "bool". Signed-off-by: H. Peter Anvin <hpa@zytor.com> Link: http://lkml.kernel.org/r/1465414726-197858-3-git-send-email-hpa@linux.intel.com Reviewed-by: Andy Lutomirski <luto@kernel.org> Reviewed-by: Borislav Petkov <bp@suse.de> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Diffstat (limited to 'arch/x86/include/asm/rmwcc.h')
-rw-r--r--arch/x86/include/asm/rmwcc.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/include/asm/rmwcc.h b/arch/x86/include/asm/rmwcc.h
index 8f7866a5b9a4..a15b73d90be3 100644
--- a/arch/x86/include/asm/rmwcc.h
+++ b/arch/x86/include/asm/rmwcc.h
@@ -23,11 +23,11 @@ cc_label: \
#define __GEN_RMWcc(fullop, var, cc, ...) \
do { \
- char c; \
+ bool c; \
asm volatile (fullop "; set" cc " %1" \
: "+m" (var), "=qm" (c) \
: __VA_ARGS__ : "memory"); \
- return c != 0; \
+ return c; \
} while (0)
#define GEN_UNARY_RMWcc(op, var, arg0, cc) \