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authorXiaoyao Li <xiaoyao.li@intel.com>2020-03-25 11:09:24 +0800
committerThomas Gleixner <tglx@linutronix.de>2020-03-27 11:43:30 +0100
commita6a60741035bb48ca8d9f92a138958818148064c (patch)
treec4ad4d6fc86dd4ef0e3fc15b753db88742bc60bb /arch/x86/include/asm/thread_info.h
parentx86/split_lock: Rework the initialization flow of split lock detection (diff)
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x86/split_lock: Avoid runtime reads of the TEST_CTRL MSR
In a context switch from a task that is detecting split locks to one that is not (or vice versa) we need to update the TEST_CTRL MSR. Currently this is done with the common sequence: read the MSR flip the bit write the MSR in order to avoid changing the value of any reserved bits in the MSR. Cache unused and reserved bits of TEST_CTRL MSR with SPLIT_LOCK_DETECT bit cleared during initialization, so we can avoid an expensive RDMSR instruction during context switch. Suggested-by: Sean Christopherson <sean.j.christopherson@intel.com> Originally-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20200325030924.132881-3-xiaoyao.li@intel.com
Diffstat (limited to 'arch/x86/include/asm/thread_info.h')
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