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| author |   Thomas Gleixner <tglx@linutronix.de> | 2016-11-19 13:47:39 +0000 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2016-11-29 19:23:17 +0100 |
| commit | a36f5136814b6a87601220927cb9ad9ecc731e92 (patch) | |
| tree | 8f216d647d363e058d3d419d9a95198ad8ded609 /arch/x86/include/asm/tsc.h | |
| parent | x86/tsc: Verify TSC_ADJUST from idle (diff) | |
| download | linux-dev-a36f5136814b6a87601220927cb9ad9ecc731e92.tar.xz linux-dev-a36f5136814b6a87601220927cb9ad9ecc731e92.zip | |
x86/tsc: Sync test only for the first cpu in a package
If the TSC_ADJUST MSR is available all CPUs in a package are forced to the
same value. So TSCs cannot be out of sync when the first CPU in the package
was in sync.
That allows to skip the sync test for all CPUs except the first starting
CPU in a package.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Link: http://lkml.kernel.org/r/20161119134017.809901363@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include/asm/tsc.h')
| -rw-r--r-- | arch/x86/include/asm/tsc.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index b896e9ee65bc..04721d54d8d9 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h @@ -49,10 +49,10 @@ extern void check_tsc_sync_source(int cpu); extern void check_tsc_sync_target(void); #ifdef CONFIG_X86_TSC -extern void tsc_store_and_check_tsc_adjust(void); +extern bool tsc_store_and_check_tsc_adjust(void); extern void tsc_verify_tsc_adjust(void); #else -static inline void tsc_store_and_check_tsc_adjust(void) { } +static inline bool tsc_store_and_check_tsc_adjust(void) { } static inline void tsc_verify_tsc_adjust(void) { } #endif |