diff options
| author |   Thomas Gleixner <tglx@linutronix.de> | 2017-10-17 08:49:37 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2017-10-17 08:53:15 +0200 |
| commit | c0fc9b1350a317da22b310d68117b0d01cb9065e (patch) | |
| tree | 0f361a7689123044f6df95d9823bff0aec941d2a /arch/x86/include/asm/tsc.h | |
| parent | x86/platform/UV: Add check of TSC state set by UV BIOS (diff) | |
| download | linux-dev-c0fc9b1350a317da22b310d68117b0d01cb9065e.tar.xz linux-dev-c0fc9b1350a317da22b310d68117b0d01cb9065e.zip | |
x86/tsc: Make CONFIG_X86_TSC=n build work again
tsc_async_resets is only available when CONFIG_X86_TSC=y. So a build with
CONFIG_X86_TSC=n breaks:
arch/x86/kernel/tsc.o: In function `tsc_init':
(.init.text+0x87b): undefined reference to `tsc_async_resets'
Add a stub define for the TSC=n case.
Side note: This config switch should simply be removed.
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Fixes: 341102c3ef29 ("x86/tsc: Add option that TSC on Socket 0 being non-zero is valid")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Mike Travis <mike.travis@hpe.com>
Diffstat (limited to 'arch/x86/include/asm/tsc.h')
| -rw-r--r-- | arch/x86/include/asm/tsc.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index 79125f3609c4..c016167720b1 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h @@ -42,7 +42,11 @@ extern unsigned long native_calibrate_tsc(void); extern unsigned long long native_sched_clock_from_tsc(u64 tsc); extern int tsc_clocksource_reliable; +#ifdef CONFIG_X86_TSC extern bool tsc_async_resets; +#else +# define tsc_async_resets false +#endif /* * Boot-time check whether the TSCs are synchronized across |