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authorThomas Gleixner <tglx@linutronix.de>2017-02-16 15:12:04 +0100
committerThomas Gleixner <tglx@linutronix.de>2017-02-16 15:14:30 +0100
commit3bba73b1b7a88d88c3ea16b7914c13d475e4a87b (patch)
tree5ad5713283dce014c0d5df7ccf3388989f5fe544 /arch/x86/include
parentx86/cpufeature: Enable RING3MWAIT for Knights Mill (diff)
downloadlinux-dev-3bba73b1b7a88d88c3ea16b7914c13d475e4a87b.tar.xz
linux-dev-3bba73b1b7a88d88c3ea16b7914c13d475e4a87b.zip
x86/cpufeature: Move RING3MWAIT feature to avoid conflicts
The original feature bit is used in a different branch already. Move it to scattered bits. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/cpufeatures.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 56e5184514c6..43c4ea9cd907 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -100,7 +100,7 @@
#define X86_FEATURE_XTOPOLOGY ( 3*32+22) /* cpu topology enum extensions */
#define X86_FEATURE_TSC_RELIABLE ( 3*32+23) /* TSC is known to be reliable */
#define X86_FEATURE_NONSTOP_TSC ( 3*32+24) /* TSC does not stop in C states */
-#define X86_FEATURE_RING3MWAIT ( 3*32+25) /* ring 3 MONITOR/MWAIT */
+/* free, was #define X86_FEATURE_CLFLUSH_MONITOR ( 3*32+25) * "" clflush reqd with monitor */
#define X86_FEATURE_EXTD_APICID ( 3*32+26) /* has extended APICID (8 bits) */
#define X86_FEATURE_AMD_DCM ( 3*32+27) /* multi-node processor */
#define X86_FEATURE_APERFMPERF ( 3*32+28) /* APERFMPERF */
@@ -186,7 +186,7 @@
*
* Reuse free bits when adding new feature flags!
*/
-
+#define X86_FEATURE_RING3MWAIT ( 7*32+ 0) /* Ring 3 MONITOR/MWAIT */
#define X86_FEATURE_CPB ( 7*32+ 2) /* AMD Core Performance Boost */
#define X86_FEATURE_EPB ( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */
#define X86_FEATURE_CAT_L3 ( 7*32+ 4) /* Cache Allocation Technology L3 */