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authorJoerg Roedel <joerg.roedel@amd.com>2009-08-31 16:01:48 +0200
committerJoerg Roedel <joerg.roedel@amd.com>2009-09-03 16:15:43 +0200
commitaa879fff5d12318259816aa35023e941a1e4d3d9 (patch)
tree150412d34e3aca54d623a63cd0a390d5358f8712 /arch/x86/kernel/amd_iommu.c
parentx86/amd-iommu: Add passthrough mode initialization functions (diff)
downloadlinux-dev-aa879fff5d12318259816aa35023e941a1e4d3d9.tar.xz
linux-dev-aa879fff5d12318259816aa35023e941a1e4d3d9.zip
x86/amd-iommu: Fix device table write order
The V bit of the device table entry has to be set after the rest of the entry is written to not confuse the hardware. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'arch/x86/kernel/amd_iommu.c')
-rw-r--r--arch/x86/kernel/amd_iommu.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 7987f20499ad..2b1e77c714ff 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -1087,9 +1087,9 @@ static void __attach_device(struct amd_iommu *iommu,
pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV;
write_lock_irqsave(&amd_iommu_devtable_lock, flags);
- amd_iommu_dev_table[devid].data[0] = lower_32_bits(pte_root);
- amd_iommu_dev_table[devid].data[1] = upper_32_bits(pte_root);
amd_iommu_dev_table[devid].data[2] = domain->id;
+ amd_iommu_dev_table[devid].data[1] = upper_32_bits(pte_root);
+ amd_iommu_dev_table[devid].data[0] = lower_32_bits(pte_root);
amd_iommu_pd_table[devid] = domain;
write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);