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authorSuresh Siddha <suresh.b.siddha@intel.com>2012-05-21 16:58:02 -0700
committerIngo Molnar <mingo@kernel.org>2012-06-06 09:51:22 +0200
commit0b8255e660a0c229ebfe8f9fde12a8d4d34c50e0 (patch)
tree1cb345c46d2e20b857bfd04423d4686f919d2f0d /arch/x86/kernel/apic/x2apic_phys.c
parentx86/irq: Update irq_cfg domain unless the new affinity is a subset of the current domain (diff)
downloadlinux-dev-0b8255e660a0c229ebfe8f9fde12a8d4d34c50e0.tar.xz
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x86/x2apic/cluster: Use all the members of one cluster specified in the smp_affinity mask for the interrupt destination
If the HW implements round-robin interrupt delivery, this enables multiple cpu's (which are part of the user specified interrupt smp_affinity mask and belong to the same x2apic cluster) to service the interrupt. Also if the platform supports Power Aware Interrupt Routing, then this enables the interrupt to be routed to an idle cpu or a busy cpu depending on the perf/power bias tunable. We are now grouping all the cpu's in a cluster to one vector domain. So that will limit the total number of interrupt sources handled by Linux. Previously we support "cpu-count * available-vectors-per-cpu" interrupt sources but this will now reduce to "cpu-count/16 * available-vectors-per-cpu". Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: yinghai@kernel.org Cc: gorcunov@openvz.org Cc: agordeev@redhat.com Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1337644682-19854-2-git-send-email-suresh.b.siddha@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/apic/x2apic_phys.c')
-rw-r--r--arch/x86/kernel/apic/x2apic_phys.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c
index c17e982db275..93b25706f177 100644
--- a/arch/x86/kernel/apic/x2apic_phys.c
+++ b/arch/x86/kernel/apic/x2apic_phys.c
@@ -120,6 +120,15 @@ static int x2apic_phys_probe(void)
return apic == &apic_x2apic_phys;
}
+/*
+ * Each logical cpu is in its own vector allocation domain.
+ */
+static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
+{
+ cpumask_clear(retmask);
+ cpumask_set_cpu(cpu, retmask);
+}
+
static struct apic apic_x2apic_phys = {
.name = "physical x2apic",