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authorThomas Gleixner <tglx@linutronix.de>2019-02-23 10:53:31 +0100
committerThomas Gleixner <tglx@linutronix.de>2019-02-23 10:53:31 +0100
commita324ca9cad4736252c33c1e28cffe1d87f262d03 (patch)
treeda64e14dd8432602634773b52073928c50dfb85c /arch/x86/kernel/cpu/bugs.c
parentPCI/MSI: Remove obsolete sanity checks for multiple interrupt sets (diff)
parentirqchip/imx-irqsteer: Add multi output interrupts support (diff)
downloadlinux-dev-a324ca9cad4736252c33c1e28cffe1d87f262d03.tar.xz
linux-dev-a324ca9cad4736252c33c1e28cffe1d87f262d03.zip
Merge tag 'irqchip-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier - Core pseudo-NMI handling code - Allow the default irq domain to be retrieved - A new interrupt controller for the Loongson LS1X platform - Affinity support for the SiFive PLIC - Better support for the iMX irqsteer driver - NUMA aware memory allocations for GICv3 - A handful of other fixes (i8259, GICv3, PLIC)
Diffstat (limited to 'arch/x86/kernel/cpu/bugs.c')
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