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| author | 2009-02-06 16:52:05 -0800 | |
|---|---|---|
| committer | 2009-02-09 11:15:15 +0100 | |
| commit | e736ad548db152776de61d7a26805cfae77ce5ce (patch) | |
| tree | bab2cb6560f2e038ccebf891cd847f37fd61a1b8 /arch/x86/kernel/cpu/intel.c | |
| parent | x86: disable intel_iommu support by default (diff) | |
| download | linux-dev-e736ad548db152776de61d7a26805cfae77ce5ce.tar.xz linux-dev-e736ad548db152776de61d7a26805cfae77ce5ce.zip | |
x86: add clflush before monitor for Intel 7400 series
For Intel 7400 series CPUs, the recommendation is to use a clflush on the
monitored address just before monitor and mwait pair [1].
This clflush makes sure that there are no false wakeups from mwait when the
monitored address was recently written to.
[1] "MONITOR/MWAIT Recommendations for Intel Xeon Processor 7400 series"
section in specification update document of 7400 series
http://download.intel.com/design/xeon/specupdt/32033601.pdf
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/intel.c')
| -rw-r--r-- | arch/x86/kernel/cpu/intel.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 430e5c38a544..24ff26a38ade 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -291,6 +291,9 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) ds_init_intel(c); } + if (c->x86 == 6 && c->x86_model == 29 && cpu_has_clflush) + set_cpu_cap(c, X86_FEATURE_CLFLUSH_MONITOR); + #ifdef CONFIG_X86_64 if (c->x86 == 15) c->x86_cache_alignment = c->x86_clflush_size * 2; |
