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| author |   Borislav Petkov <bp@suse.de> | 2015-05-07 12:06:43 +0200 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2015-05-07 12:06:43 +0200 |
| commit | 3490c0e45f7e5a5b1e5c62e4c60b0e55b2e75e71 (patch) | |
| tree | 6fa19122f9d91a6f99e7412959e4d78f65ba7e41 /arch/x86/kernel/cpu/mcheck/mce_amd.c | |
| parent | x86/traps: Remove superfluous weak definitions and dead code (diff) | |
| download | linux-dev-3490c0e45f7e5a5b1e5c62e4c60b0e55b2e75e71.tar.xz linux-dev-3490c0e45f7e5a5b1e5c62e4c60b0e55b2e75e71.zip | |
x86/mce/amd: Zap changelog
It is useless and git history has it all detailed anyway. Update
copyright while at it.
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Diffstat (limited to 'arch/x86/kernel/cpu/mcheck/mce_amd.c')
| -rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce_amd.c | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c index 70e1bf6f784d..e99b15077e94 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c @@ -1,21 +1,13 @@ /* - * (c) 2005-2012 Advanced Micro Devices, Inc. + * (c) 2005-2015 Advanced Micro Devices, Inc. * Your use of this code is subject to the terms and conditions of the * GNU general public license version 2. See "COPYING" or * http://www.gnu.org/licenses/gpl.html * * Written by Jacob Shin - AMD, Inc. - * * Maintained by: Borislav Petkov <bp@alien8.de> * - * April 2006 - * - added support for AMD Family 0x10 processors - * May 2012 - * - major scrubbing - * May 2015 - * - add support for deferred error interrupts (Aravind Gopalakrishnan) - * - * All MC4_MISCi registers are shared between multi-cores + * All MC4_MISCi registers are shared between cores on a node. */ #include <linux/interrupt.h> #include <linux/notifier.h> |