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authorOlof Johansson <olof@lixom.net>2012-09-11 23:22:25 -0700
committerOlof Johansson <olof@lixom.net>2012-09-11 23:22:25 -0700
commitf46e374c1ea7fafce70a838f09fbd67de3e4d49f (patch)
treee191e5316bdb8558bd3e2b0981c715bedd225ca7 /arch/x86/kernel/cpu/perf_event_intel.c
parentMerge branch 'ks8695/boards' into next/boards (diff)
parentARM: shmobile: marzen: enable thermal sensor (diff)
downloadlinux-dev-f46e374c1ea7fafce70a838f09fbd67de3e4d49f.tar.xz
linux-dev-f46e374c1ea7fafce70a838f09fbd67de3e4d49f.zip
Merge branch 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards
* 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: marzen: enable thermal sensor ARM: shmobile: marzen: fixup regulator id for smsc911x ARM: shmobile: marzen: add SDHI0 support + sync to 3.6-rc4
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_intel.c')
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 382366977d4c..7f2739e03e79 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1522,8 +1522,16 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr)
arr[0].msr = MSR_CORE_PERF_GLOBAL_CTRL;
arr[0].host = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask;
arr[0].guest = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_host_mask;
+ /*
+ * If PMU counter has PEBS enabled it is not enough to disable counter
+ * on a guest entry since PEBS memory write can overshoot guest entry
+ * and corrupt guest memory. Disabling PEBS solves the problem.
+ */
+ arr[1].msr = MSR_IA32_PEBS_ENABLE;
+ arr[1].host = cpuc->pebs_enabled;
+ arr[1].guest = 0;
- *nr = 1;
+ *nr = 2;
return arr;
}