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| author |   Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> | 2019-10-07 19:00:22 +0000 |
|---|---|---|
| committer |   Ingo Molnar <mingo@kernel.org> | 2019-10-08 13:25:24 +0200 |
| commit | 454de1e7d970d6bc567686052329e4814842867c (patch) | |
| tree | 194120dc64c7372d59274797a05db8617ac9bd96 /arch/x86/kernel/cpu/vmware.c | |
| parent | Linux 5.4-rc2 (diff) | |
| download | linux-dev-454de1e7d970d6bc567686052329e4814842867c.tar.xz linux-dev-454de1e7d970d6bc567686052329e4814842867c.zip | |
x86/asm: Fix MWAITX C-state hint value
As per "AMD64 Architecture Programmer's Manual Volume 3: General-Purpose
and System Instructions", MWAITX EAX[7:4]+1 specifies the optional hint
of the optimized C-state. For C0 state, EAX[7:4] should be set to 0xf.
Currently, a value of 0xf is set for EAX[3:0] instead of EAX[7:4]. Fix
this by changing MWAITX_DISABLE_CSTATES from 0xf to 0xf0.
This hasn't had any implications so far because setting reserved bits in
EAX is simply ignored by the CPU.
[ bp: Fixup comment in delay_mwaitx() and massage. ]
Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Frederic Weisbecker <frederic@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "x86@kernel.org" <x86@kernel.org>
Cc: Zhenzhong Duan <zhenzhong.duan@oracle.com>
Cc: <stable@vger.kernel.org>
Link: https://lkml.kernel.org/r/20191007190011.4859-1-Janakarajan.Natarajan@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu/vmware.c')
0 files changed, 0 insertions, 0 deletions