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| author |   Huang, Ying <ying.huang@intel.com> | 2007-10-17 18:04:35 +0200 |
|---|---|---|
| committer |   Thomas Gleixner <tglx@inhelltoy.tec.linutronix.de> | 2007-10-17 20:15:43 +0200 |
| commit | 84e0fdb1754d066dd0a8b257de7299f392d1e727 (patch) | |
| tree | e1ce3339ba46cbe066e348222e9446cb5ad109f2 /arch/x86/kernel/pci-calgary_64.c | |
| parent | x86: voyager don't try to support uniprocessor builds (diff) | |
| download | linux-dev-84e0fdb1754d066dd0a8b257de7299f392d1e727.tar.xz linux-dev-84e0fdb1754d066dd0a8b257de7299f392d1e727.zip | |
x86: NX bit handling in change_page_attr()
This patch fixes a bug of change_page_attr/change_page_attr_addr on
Intel x86_64 CPUs. After changing page attribute to be executable with
these functions, the page remains un-executable on Intel x86_64 CPU.
Because on Intel x86_64 CPU, only if the "NX" bits of all four level
page tables are cleared, the corresponding page is executable (refer to
section 4.13.2 of Intel 64 and IA-32 Architectures Software Developer's
Manual). So, the bug is fixed through clearing the "NX" bit of PMD when
splitting the huge PMD.
Signed-off-by: Huang Ying <ying.huang@intel.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/pci-calgary_64.c')
0 files changed, 0 insertions, 0 deletions