diff options
| author |   Andi Kleen <ak@suse.de> | 2008-01-30 13:32:37 +0100 |
|---|---|---|
| committer |   Ingo Molnar <mingo@elte.hu> | 2008-01-30 13:32:37 +0100 |
| commit | de4218634e3df6d73a3e6cdfdf3a17fa3bc7e013 (patch) | |
| tree | df7438f5ee81fc7c93f5e9ab3f4249a5afc3d31c /arch/x86/kernel/setup_64.c | |
| parent | x86: make ptrace.h safe to include from assembler code (diff) | |
| download | linux-dev-de4218634e3df6d73a3e6cdfdf3a17fa3bc7e013.tar.xz linux-dev-de4218634e3df6d73a3e6cdfdf3a17fa3bc7e013.zip | |
x86: implement support to synchronize RDTSC through MFENCE on AMD CPUs
According to AMD RDTSC can be synchronized through MFENCE.
Implement the necessary CPUID bit for that.
Cc: andreas.herrmann3@amd.com
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/setup_64.c')
| -rw-r--r-- | arch/x86/kernel/setup_64.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c index 02409100f456..2139aa6ac469 100644 --- a/arch/x86/kernel/setup_64.c +++ b/arch/x86/kernel/setup_64.c @@ -746,8 +746,8 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) if (c->x86 == 0xf || c->x86 == 0x10 || c->x86 == 0x11) set_cpu_cap(c, X86_FEATURE_K8); - /* RDTSC can be speculated around */ - clear_cpu_cap(c, X86_FEATURE_SYNC_RDTSC); + /* MFENCE stops RDTSC speculation */ + set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC); /* Family 10 doesn't support C states in MWAIT so don't use it */ if (c->x86 == 0x10 && !force_mwait) |