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| author |   Sean Christopherson <seanjc@google.com> | 2022-02-04 21:41:56 +0000 |
|---|---|---|
| committer |   Paolo Bonzini <pbonzini@redhat.com> | 2022-03-01 08:50:45 -0500 |
| commit | b5ede3df79b7274db0aa6acbdb1185c659f81636 (patch) | |
| tree | c97e52fcfb42cbf2fcada35bd803e60c6d90f2bf /arch/x86/kvm/lapic.c | |
| parent | KVM: x86: Do not change ICR on write to APIC_SELF_IPI (diff) | |
| download | linux-dev-b5ede3df79b7274db0aa6acbdb1185c659f81636.tar.xz linux-dev-b5ede3df79b7274db0aa6acbdb1185c659f81636.zip | |
KVM: VMX: Handle APIC-write offset wrangling in VMX code
Move the vAPIC offset adjustments done in the APIC-write trap path from
common x86 to VMX in anticipation of using the nodecode path for SVM's
AVIC. The adjustment reflects hardware behavior, i.e. it's technically a
property of VMX, no common x86. SVM's AVIC behavior is identical, so
it's a bit of a moot point, the goal is purely to make it easier to
understand why the adjustment is ok.
No functional change intended.
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20220204214205.3306634-3-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/kvm/lapic.c')
| -rw-r--r-- | arch/x86/kvm/lapic.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index d5a33b6be7d5..535fd566a3a2 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -2180,9 +2180,6 @@ void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset) { u32 val = 0; - /* hw has done the conditional check and inst decode */ - offset &= 0xff0; - kvm_lapic_reg_read(vcpu->arch.apic, offset, 4, &val); /* TODO: optimize to just emulate side effect w/o one more write */ |