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author | 2009-03-13 12:21:30 +0100 | |
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committer | 2009-04-06 09:29:32 +0200 | |
commit | 60b3df9c1e24a18aabb412da9905208c5f04ebea (patch) | |
tree | 2c132d1a82648b176f8662cea32f51c208517dd5 /arch/x86/mm/fault.c | |
parent | perf_counter: use list_move_tail() (diff) | |
download | linux-dev-60b3df9c1e24a18aabb412da9905208c5f04ebea.tar.xz linux-dev-60b3df9c1e24a18aabb412da9905208c5f04ebea.zip |
perf_counter: add comment to barrier
We need to ensure the enabled=0 write happens before we
start disabling the actual counters, so that a pcm_amd_enable()
will not enable one underneath us.
I think the race is impossible anyway, we always balance the
ops within any one context and perform enable() with IRQs disabled.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/mm/fault.c')
0 files changed, 0 insertions, 0 deletions