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| author |   Peter Zijlstra <peterz@infradead.org> | 2018-09-19 10:50:17 +0200 |
|---|---|---|
| committer |   Thomas Gleixner <tglx@linutronix.de> | 2018-09-27 20:39:40 +0200 |
| commit | c6185b1f21a47af94617fde3af7e803817b522a9 (patch) | |
| tree | 49e13ca1af03c9842c7ba2a3b4e6db30e69fbd69 /arch/x86/mm/pageattr.c | |
| parent | x86/mm/cpa: Avoid the 4k pages check completely (diff) | |
| download | linux-dev-c6185b1f21a47af94617fde3af7e803817b522a9.tar.xz linux-dev-c6185b1f21a47af94617fde3af7e803817b522a9.zip | |
x86/mm/cpa: Use flush_tlb_all()
Instead of open-coding it..
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Dave Hansen <dave.hansen@intel.com>
Cc: Bin Yang <bin.yang@intel.com>
Cc: Mark Gross <mark.gross@intel.com>
Link: https://lkml.kernel.org/r/20180919085947.831102058@infradead.org
Diffstat (limited to 'arch/x86/mm/pageattr.c')
| -rw-r--r-- | arch/x86/mm/pageattr.c | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index 4e55ded01be5..a22f6b71a308 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c @@ -285,16 +285,6 @@ static void cpa_flush_all(unsigned long cache) on_each_cpu(__cpa_flush_all, (void *) cache, 1); } -static void __cpa_flush_range(void *arg) -{ - /* - * We could optimize that further and do individual per page - * tlb invalidates for a low number of pages. Caveat: we must - * flush the high aliases on 64bit as well. - */ - __flush_tlb_all(); -} - static void cpa_flush_range(unsigned long start, int numpages, int cache) { unsigned int i, level; @@ -303,7 +293,7 @@ static void cpa_flush_range(unsigned long start, int numpages, int cache) BUG_ON(irqs_disabled() && !early_boot_irqs_disabled); WARN_ON(PAGE_ALIGN(start) != start); - on_each_cpu(__cpa_flush_range, NULL, 1); + flush_tlb_all(); if (!cache) return; |