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| author |   Ingo Molnar <mingo@elte.hu> | 2009-02-22 20:05:19 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-02-22 20:05:19 +0100 |
| commit | fc6fc7f1b1095b92d4834e69b385b91e412a7ce5 (patch) | |
| tree | 2ad451d5dac4d460830536944cef1de93be36b2a /arch/x86/mm | |
| parent | x86: select x2apic ops in early apic probe only if x2apic mode is enabled (diff) | |
| parent | PM: Split up sysdev_[suspend|resume] from device_power_[down|up] (diff) | |
| download | linux-dev-fc6fc7f1b1095b92d4834e69b385b91e412a7ce5.tar.xz linux-dev-fc6fc7f1b1095b92d4834e69b385b91e412a7ce5.zip | |
Merge branch 'linus' into x86/apic
Conflicts:
arch/x86/mach-default/setup.c
Semantic conflict resolution:
arch/x86/kernel/setup.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/mm')
| -rw-r--r-- | arch/x86/mm/numa_64.c | 2 | ||||
| -rw-r--r-- | arch/x86/mm/pageattr.c | 15 |
2 files changed, 6 insertions, 11 deletions
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c index deb1c1ab7868..64c9cf043cdd 100644 --- a/arch/x86/mm/numa_64.c +++ b/arch/x86/mm/numa_64.c @@ -166,7 +166,7 @@ int __init compute_hash_shift(struct bootnode *nodes, int numnodes, return shift; } -int early_pfn_to_nid(unsigned long pfn) +int __meminit __early_pfn_to_nid(unsigned long pfn) { return phys_to_nid(pfn << PAGE_SHIFT); } diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index 8ca0d8566fc8..7be47d1a97e4 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c @@ -508,18 +508,13 @@ static int split_large_page(pte_t *kpte, unsigned long address) #endif /* - * Install the new, split up pagetable. Important details here: + * Install the new, split up pagetable. * - * On Intel the NX bit of all levels must be cleared to make a - * page executable. See section 4.13.2 of Intel 64 and IA-32 - * Architectures Software Developer's Manual). - * - * Mark the entry present. The current mapping might be - * set to not present, which we preserved above. + * We use the standard kernel pagetable protections for the new + * pagetable protections, the actual ptes set above control the + * primary protection behavior: */ - ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte))); - pgprot_val(ref_prot) |= _PAGE_PRESENT; - __set_pmd_pte(kpte, address, mk_pte(base, ref_prot)); + __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); base = NULL; out_unlock: |