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| author |   Longpeng(Mike) <longpeng2@huawei.com> | 2016-10-14 08:42:20 +0800 |
|---|---|---|
| committer |   Thomas Gleixner <tglx@linutronix.de> | 2016-10-14 14:14:20 +0200 |
| commit | c836eeda3e1e652d424bbbbb908f07eb7380448c (patch) | |
| tree | f2b55ea86f52b12c1b155f557651ea9a9c886e6c /arch/x86 | |
| parent | x86/smp: Add irq_enter/exit() in smp_reschedule_interrupt() (diff) | |
| download | linux-dev-c836eeda3e1e652d424bbbbb908f07eb7380448c.tar.xz linux-dev-c836eeda3e1e652d424bbbbb908f07eb7380448c.zip | |
x86: Remove duplicate rtit status MSR macro
The MSR_IA32_RTIT_STATUS is defined twice, so remove one.
Signed-off-by: Longpeng(Mike) <longpeng2@huawei.com>
Acked-by: Borislav Petkov <bp@suse.de>
Cc: len.brown@intel.com
Cc: peterz@infradead.org
Cc: rafael.j.wysocki@intel.com
Cc: alexander.shishkin@linux.intel.com
Cc: ray.huang@amd.com
Cc: Aravind.Gopalakrishnan@amd.com
Cc: wu.wubin@huawei.com
Cc: srinivas.pandruvada@linux.intel.com
Cc: zhaoshenglong@huawei.com
Cc: vladimir_zapolskiy@mentor.com
Link: http://lkml.kernel.org/r/1476405740-80816-1-git-send-email-longpeng2@huawei.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/include/asm/msr-index.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 56f4c6676b29..78f3760ca1f2 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -88,7 +88,6 @@ #define MSR_IA32_RTIT_CTL 0x00000570 #define MSR_IA32_RTIT_STATUS 0x00000571 -#define MSR_IA32_RTIT_STATUS 0x00000571 #define MSR_IA32_RTIT_ADDR0_A 0x00000580 #define MSR_IA32_RTIT_ADDR0_B 0x00000581 #define MSR_IA32_RTIT_ADDR1_A 0x00000582 |