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| author |   Max Filippov <jcmvbkbc@gmail.com> | 2019-05-12 20:28:25 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2019-07-08 10:04:48 -0700 |
| commit | d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a (patch) | |
| tree | 1780d36ac99c16f8ed506948a020017e84a89a9f /arch/xtensa/lib/checksum.S | |
| parent | xtensa: One function call less in bootmem_init() (diff) | |
| download | linux-dev-d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a.tar.xz linux-dev-d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a.zip | |
xtensa: abstract 'entry' and 'retw' in assembly code
Provide abi_entry, abi_entry_default, abi_ret and abi_ret_default macros
that allocate aligned stack frame in windowed and call0 ABIs.
Provide XTENSA_SPILL_STACK_RESERVE macro that specifies required stack
frame size when register spilling is involved.
Replace all uses of 'entry' and 'retw' with the above macros.
This makes most of the xtensa assembly code ready for XEA3 and call0 ABI.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/lib/checksum.S')
| -rw-r--r-- | arch/xtensa/lib/checksum.S | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/xtensa/lib/checksum.S b/arch/xtensa/lib/checksum.S index c6e73b12e519..4cb9ca58d9ad 100644 --- a/arch/xtensa/lib/checksum.S +++ b/arch/xtensa/lib/checksum.S @@ -43,7 +43,7 @@ ENTRY(csum_partial) * Experiments with Ethernet and SLIP connections show that buf * is aligned on either a 2-byte or 4-byte boundary. */ - entry sp, 32 + abi_entry_default extui a5, a2, 0, 2 bnez a5, 8f /* branch if 2-byte aligned */ /* Fall-through on common case, 4-byte alignment */ @@ -107,7 +107,7 @@ ENTRY(csum_partial) ONES_ADD(a4, a6) 7: mov a2, a4 - retw + abi_ret_default /* uncommon case, buf is 2-byte aligned */ 8: @@ -195,7 +195,7 @@ unsigned int csum_partial_copy_generic (const char *src, char *dst, int len, ENTRY(csum_partial_copy_generic) - entry sp, 32 + abi_entry_default mov a12, a3 mov a11, a4 or a10, a2, a3 @@ -316,7 +316,7 @@ EX(11f) s8i a9, a3, 0 ONES_ADD(a5, a9) 8: mov a2, a5 - retw + abi_ret_default 5: /* Control branch to here when either src or dst is odd. We @@ -383,12 +383,12 @@ ENDPROC(csum_partial_copy_generic) blt a12, a11, .Leloop #endif 2: - retw + abi_ret_default 11: movi a2, -EFAULT s32i a2, a7, 0 /* dst_err_ptr */ movi a2, 0 - retw + abi_ret_default .previous |