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authorMax Filippov <jcmvbkbc@gmail.com>2019-10-15 22:14:15 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2019-11-26 11:33:38 -0800
commite444917019258ef3bd564d0b4a432add2c26a2ae (patch)
tree0305500f3cb14d54a5778424686288b10459b14b /arch/xtensa
parentxtensa: use macros to generate *_bit and test_and_*_bit functions (diff)
downloadlinux-dev-e444917019258ef3bd564d0b4a432add2c26a2ae.tar.xz
linux-dev-e444917019258ef3bd564d0b4a432add2c26a2ae.zip
xtensa: use named assembly arguments in bitops.h
Numeric assembly arguments are hard to understand and assembly code that uses them is hard to modify. Use named arguments in BIT_OP and TEST_AND_BIT_OP macros. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa')
-rw-r--r--arch/xtensa/include/asm/bitops.h56
1 files changed, 28 insertions, 28 deletions
diff --git a/arch/xtensa/include/asm/bitops.h b/arch/xtensa/include/asm/bitops.h
index bfaad56870f6..5a35d026c1c3 100644
--- a/arch/xtensa/include/asm/bitops.h
+++ b/arch/xtensa/include/asm/bitops.h
@@ -107,13 +107,13 @@ static inline void op##_bit(unsigned int bit, volatile unsigned long *p)\
p += bit >> 5; \
\
__asm__ __volatile__( \
- "1: l32ex %0, %2\n" \
- " "insn" %0, %0, %1\n" \
- " s32ex %0, %2\n" \
- " getex %0\n" \
- " beqz %0, 1b\n" \
- : "=&a" (tmp) \
- : "a" (inv mask), "a" (p) \
+ "1: l32ex %[tmp], %[addr]\n" \
+ " "insn" %[tmp], %[tmp], %[mask]\n" \
+ " s32ex %[tmp], %[addr]\n" \
+ " getex %[tmp]\n" \
+ " beqz %[tmp], 1b\n" \
+ : [tmp] "=&a" (tmp) \
+ : [mask] "a" (inv mask), [addr] "a" (p) \
: "memory"); \
}
@@ -127,13 +127,13 @@ test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \
p += bit >> 5; \
\
__asm__ __volatile__( \
- "1: l32ex %1, %3\n" \
- " "insn" %0, %1, %2\n" \
- " s32ex %0, %3\n" \
- " getex %0\n" \
- " beqz %0, 1b\n" \
- : "=&a" (tmp), "=&a" (value) \
- : "a" (inv mask), "a" (p) \
+ "1: l32ex %[value], %[addr]\n" \
+ " "insn" %[tmp], %[value], %[mask]\n" \
+ " s32ex %[tmp], %[addr]\n" \
+ " getex %[tmp]\n" \
+ " beqz %[tmp], 1b\n" \
+ : [tmp] "=&a" (tmp), [value] "=&a" (value) \
+ : [mask] "a" (inv mask), [addr] "a" (p) \
: "memory"); \
\
return value & mask; \
@@ -150,13 +150,13 @@ static inline void op##_bit(unsigned int bit, volatile unsigned long *p)\
p += bit >> 5; \
\
__asm__ __volatile__( \
- "1: l32i %1, %3, 0\n" \
- " wsr %1, scompare1\n" \
- " "insn" %0, %1, %2\n" \
- " s32c1i %0, %3, 0\n" \
- " bne %0, %1, 1b\n" \
- : "=&a" (tmp), "=&a" (value) \
- : "a" (inv mask), "a" (p) \
+ "1: l32i %[value], %[addr], 0\n" \
+ " wsr %[value], scompare1\n" \
+ " "insn" %[tmp], %[value], %[mask]\n" \
+ " s32c1i %[tmp], %[addr], 0\n" \
+ " bne %[tmp], %[value], 1b\n" \
+ : [tmp] "=&a" (tmp), [value] "=&a" (value) \
+ : [mask] "a" (inv mask), [addr] "a" (p) \
: "memory"); \
}
@@ -170,13 +170,13 @@ test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \
p += bit >> 5; \
\
__asm__ __volatile__( \
- "1: l32i %1, %3, 0\n" \
- " wsr %1, scompare1\n" \
- " "insn" %0, %1, %2\n" \
- " s32c1i %0, %3, 0\n" \
- " bne %0, %1, 1b\n" \
- : "=&a" (tmp), "=&a" (value) \
- : "a" (inv mask), "a" (p) \
+ "1: l32i %[value], %[addr], 0\n" \
+ " wsr %[value], scompare1\n" \
+ " "insn" %[tmp], %[value], %[mask]\n" \
+ " s32c1i %[tmp], %[addr], 0\n" \
+ " bne %[tmp], %[value], 1b\n" \
+ : [tmp] "=&a" (tmp), [value] "=&a" (value) \
+ : [mask] "a" (inv mask), [addr] "a" (p) \
: "memory"); \
\
return tmp & mask; \