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| author |   Arnd Bergmann <arnd@arndb.de> | 2022-04-21 16:00:23 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2022-04-22 11:14:55 +0200 |
| commit | 0cd47616cfbb1422e24414daa5a96637fc5aa663 (patch) | |
| tree | 9a98c733a529011701ae5bae8cd5037f7203072c /arch | |
| parent | ARM: s3c: fix include path (diff) | |
| parent | MAINTAINERS: omap1: Add Janusz as an additional maintainer (diff) | |
| download | linux-dev-0cd47616cfbb1422e24414daa5a96637fc5aa663.tar.xz linux-dev-0cd47616cfbb1422e24414daa5a96637fc5aa663.zip | |
Merge branch 'omap1/multiplatform-prep' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc into arm/multiplatform
This is the full series for converting OMAP1 to multiplatform, rebased
from my 2019 attempt to do the same thing. The soc tree contains simpler
patches to do the same for iop32x, ixp4xx, ep93xx and s3c24xx, which
means we are getting closer to completing this for all ARMv5 platforms
(I have patches for PXA, which is the last one remaining).
Janusz already tested the branch separately and did the missing work
for the common-clk conversion after my previous approach was broken.
Aaro found one regression during additional testing, this is fixed now.
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
84 files changed, 877 insertions, 2666 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index db9b9ed5d7c7..3f987f42afd9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -418,14 +418,12 @@ config ARCH_SA1100 config ARCH_OMAP1 bool "TI OMAP1" depends on CPU_LITTLE_ENDIAN - select ARCH_OMAP select CLKSRC_MMIO + select FORCE_PCI if PCCARD select GENERIC_IRQ_CHIP select GPIOLIB select HAVE_LEGACY_CLK select IRQ_DOMAIN - select NEED_MACH_IO_H if PCCARD - select NEED_MACH_MEMORY_H select SPARSE_IRQ help Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx) @@ -586,8 +584,6 @@ source "arch/arm/mach-npcm/Kconfig" source "arch/arm/mach-nspire/Kconfig" -source "arch/arm/plat-omap/Kconfig" - source "arch/arm/mach-omap1/Kconfig" source "arch/arm/mach-omap2/Kconfig" diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 0c9497d549e3..dbc111e1f4e2 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1837,9 +1837,9 @@ config DEBUG_UART_VIRT default 0xfec00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN default 0xfec00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN default 0xfef36000 if DEBUG_HIGHBANK_UART - default 0xfefb0000 if DEBUG_OMAP1UART1 || DEBUG_OMAP7XXUART1 - default 0xfefb0800 if DEBUG_OMAP1UART2 || DEBUG_OMAP7XXUART2 - default 0xfefb9800 if DEBUG_OMAP1UART3 || DEBUG_OMAP7XXUART3 + default 0xff0b0000 if DEBUG_OMAP1UART1 || DEBUG_OMAP7XXUART1 + default 0xff0b0800 if DEBUG_OMAP1UART2 || DEBUG_OMAP7XXUART2 + default 0xff0b9800 if DEBUG_OMAP1UART3 || DEBUG_OMAP7XXUART3 default 0xffd01000 if DEBUG_HIP01_UART default DEBUG_UART_PHYS if !MMU depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 8740e3a63afb..2c5f9b74fb91 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -224,7 +224,6 @@ machine-$(CONFIG_PLAT_SPEAR) += spear # Platform directory name. This list is sorted alphanumerically # by CONFIG_* macro name. -plat-$(CONFIG_ARCH_OMAP) += omap plat-$(CONFIG_PLAT_ORION) += orion plat-$(CONFIG_PLAT_PXA) += pxa diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index 208c700c2455..d4b0cd91a4f9 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -28,6 +28,15 @@ config ARCH_OMAP16XX select CPU_ARM926T select OMAP_DM_TIMER +config ARCH_OMAP1_ANY + select ARCH_OMAP + def_bool ARCH_OMAP730 || ARCH_OMAP850 || ARCH_OMAP15XX || ARCH_OMAP16XX + +config ARCH_OMAP + bool + +comment "OMAP Feature Selections" + config OMAP_MUX bool "OMAP multiplexing support" default y @@ -53,6 +62,54 @@ config OMAP_MUX_WARNINGS to change the pin multiplexing setup. When there are no warnings printed, it's safe to deselect OMAP_MUX for your product. +config OMAP_32K_TIMER + bool "Use 32KHz timer" + depends on ARCH_OMAP16XX + default ARCH_OMAP16XX + help + Select this option if you want to enable the OMAP 32KHz timer. + This timer saves power compared to the OMAP_MPU_TIMER, and has + support for no tick during idle. The 32KHz timer provides less + intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is + currently only available for OMAP16XX, 24XX, 34XX, OMAP4/5 and DRA7XX. + + On OMAP2PLUS this value is only used for CONFIG_HZ and + CLOCK_TICK_RATE compile time calculation. + The actual timer selection is done in the board file + through the (DT_)MACHINE_START structure. + +config OMAP_MPU_TIMER + bool "Use mpu timer" + depends on ARCH_OMAP1 + help + Select this option if you want to use the OMAP mpu timer. This + timer provides more intra-tick resolution than the 32KHz timer, + but consumes more power. + +config OMAP_SERIAL_WAKE + bool "Enable wake-up events for serial ports" + depends on ARCH_OMAP1 && OMAP_MUX + default y + help + Select this option if you want to have your system wake up + to data on the serial RX line. This allows you to wake the + system from serial console. + +config OMAP_RESET_CLOCKS + bool "Reset unused clocks during boot" + depends on ARCH_OMAP + help + Say Y if you want to reset unused clocks during boot. + This option saves power, but assumes all drivers are + using the clock framework. Broken drivers that do not + yet use clock framework may not work with this option. + If you are booting from another operating system, you + probably do not want this option enabled until your + device drivers work properly. + +config ARCH_OMAP_OTG + bool + comment "OMAP Board Type" config MACH_OMAP_INNOVATOR diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index c757a52d0801..506074b86333 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -3,9 +3,11 @@ # Makefile for the linux kernel. # +ifdef CONFIG_ARCH_OMAP1_ANY + # Common support obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \ - serial.o devices.o dma.o fb.o + serial.o devices.o dma.o omap-dma.o fb.o obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o ifneq ($(CONFIG_SND_SOC_OMAP_MCBSP),) @@ -58,6 +60,4 @@ obj-$(CONFIG_ARCH_OMAP850) += gpio7xx.o obj-$(CONFIG_ARCH_OMAP15XX) += gpio15xx.o obj-$(CONFIG_ARCH_OMAP16XX) += gpio16xx.o -ifneq ($(CONFIG_FB_OMAP),) -obj-y += lcd_dma.o endif diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S index f745a65d3bd7..35c2f9574dbd 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S +++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S @@ -13,14 +13,15 @@ #include <linux/linkage.h> #include <linux/platform_data/ams-delta-fiq.h> #include <linux/platform_data/gpio-omap.h> +#include <linux/soc/ti/omap1-io.h> #include <asm/assembler.h> #include <asm/irq.h> +#include "hardware.h" #include "ams-delta-fiq.h" #include "board-ams-delta.h" #include "iomap.h" -#include "soc.h" /* * OMAP1510 GPIO related symbol copied from arch/arm/mach-omap1/gpio15xx.c. diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c index 4eea3e39e633..1f5852be057e 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.c +++ b/arch/arm/mach-omap1/ams-delta-fiq.c @@ -21,7 +21,9 @@ #include <linux/platform_device.h> #include <asm/fiq.h> +#include <linux/soc/ti/omap1-io.h> +#include "hardware.h" #include "ams-delta-fiq.h" #include "board-ams-delta.h" diff --git a/arch/arm/mach-omap1/ams-delta-fiq.h b/arch/arm/mach-omap1/ams-delta-fiq.h index fd76df3cce37..7f843caedb7c 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.h +++ b/arch/arm/mach-omap1/ams-delta-fiq.h @@ -16,7 +16,7 @@ #ifndef __AMS_DELTA_FIQ_H #define __AMS_DELTA_FIQ_H -#include <mach/irqs.h> +#include "irqs.h" /* * Interrupt number used for passing control from FIQ to IRQ. diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 1026a816dcc0..cd97df48686e 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -28,6 +28,7 @@ #include <linux/omapfb.h> #include <linux/io.h> #include <linux/platform_data/gpio-omap.h> +#include <linux/soc/ti/omap1-mux.h> #include <asm/serial.h> #include <asm/mach-types.h> @@ -35,11 +36,9 @@ #include <asm/mach/map.h> #include <linux/platform_data/keypad-omap.h> -#include <mach/mux.h> - -#include <mach/hardware.h> -#include <mach/usb.h> +#include "hardware.h" +#include "usb.h" #include "ams-delta-fiq.h" #include "board-ams-delta.h" #include "iomap.h" @@ -407,9 +406,6 @@ static struct gpio_led gpio_leds[] __initdata = { [LATCH1_PIN_LED_CAMERA] = { .name = "camera", .default_state = LEDS_GPIO_DEFSTATE_OFF, -#ifdef CONFIG_LEDS_TRIGGERS - .default_trigger = "ams_delta_camera", -#endif }, [LATCH1_PIN_LED_ADVERT] = { .name = "advert", @@ -456,10 +452,6 @@ static struct gpiod_lookup_table leds_gpio_table = { }, }; -#ifdef CONFIG_LEDS_TRIGGERS -DEFINE_LED_TRIGGER(ams_delta_camera_led_trigger); -#endif - static struct platform_device ams_delta_audio_device = { .name = "ams-delta-audio", .id = -1, @@ -705,10 +697,6 @@ static void __init ams_delta_init(void) omap_register_i2c_bus(1, 100, NULL, 0); omap1_usb_init(&ams_delta_usb_config); -#ifdef CONFIG_LEDS_TRIGGERS - led_trigger_register_simple("ams_delta_camera", - &ams_delta_camera_led_trigger); -#endif platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); /* diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index c3aa6f2e5546..f21e15c7b973 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -23,13 +23,13 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/tc.h> -#include <mach/mux.h> -#include "flash.h" +#include <linux/soc/ti/omap1-io.h> #include <linux/platform_data/keypad-omap.h> +#include "tc.h" -#include <mach/hardware.h> - +#include "mux.h" +#include "flash.h" +#include "hardware.h" #include "iomap.h" #include "common.h" #include "fpga.h" diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index c62554990115..3b2bcaf4bb01 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -14,15 +14,13 @@ #include <linux/init.h> #include <linux/platform_device.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/mux.h> - -#include <mach/usb.h> - +#include "hardware.h" +#include "mux.h" +#include "usb.h" #include "common.h" /* assume no Mini-AB port */ diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 977b0b744c22..f28a4c3ea501 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -28,22 +28,20 @@ #include <linux/mfd/tps65010.h> #include <linux/smc91x.h> #include <linux/omapfb.h> +#include <linux/omap-dma.h> #include <linux/platform_data/gpio-omap.h> +#include <linux/platform_data/keypad-omap.h> #include <linux/leds.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/mux.h> -#include <linux/omap-dma.h> -#include <mach/tc.h> -#include <linux/platform_data/keypad-omap.h> +#include "tc.h" +#include "mux.h" #include "flash.h" - -#include <mach/hardware.h> -#include <mach/usb.h> - +#include "hardware.h" +#include "usb.h" #include "common.h" #include "board-h2.h" diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 4249984f9c30..1e4c57710fcc 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -29,6 +29,8 @@ #include <linux/smc91x.h> #include <linux/omapfb.h> #include <linux/platform_data/gpio-omap.h> +#include <linux/platform_data/keypad-omap.h> +#include <linux/omap-dma.h> #include <linux/leds.h> #include <asm/setup.h> @@ -37,16 +39,12 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/mux.h> -#include <mach/tc.h> -#include <linux/platform_data/keypad-omap.h> -#include <linux/omap-dma.h> +#include "tc.h" +#include "mux.h" #include "flash.h" - -#include <mach/hardware.h> -#include <mach/irqs.h> -#include <mach/usb.h> - +#include "hardware.h" +#include "irqs.h" +#include "usb.h" #include "common.h" #include "board-h3.h" diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 258304edf23e..ec049cee49c6 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -23,16 +23,16 @@ #include <linux/spi/ads7846.h> #include <linux/omapfb.h> #include <linux/platform_data/keypad-omap.h> +#include <linux/soc/ti/omap1-io.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/omap7xx.h> +#include "hardware.h" +#include "omap7xx.h" #include "mmc.h" - -#include <mach/irqs.h> -#include <mach/usb.h> - +#include "irqs.h" +#include "usb.h" #include "common.h" /* LCD register definition */ @@ -170,7 +170,7 @@ static const unsigned int htc_herald_keymap[] = { KEY(3, 0, KEY_VOLUMEUP), /* Volume up */ KEY(4, 0, KEY_F2), /* Right bar (landscape) */ KEY(5, 0, KEY_MAIL), /* Win key (portrait) */ - KEY(6, 0, KEY_DIRECTORY), /* Right bar (protrait) */ + KEY(6, 0, KEY_DIRECTORY), /* Right bar (portrait) */ KEY(0, 1, KEY_LEFTCTRL), /* Windows key */ KEY(1, 1, KEY_COMMA), KEY(2, 1, KEY_M), diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index cbe093f969d5..6deb4ca079e9 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -23,19 +23,17 @@ #include <linux/input.h> #include <linux/smc91x.h> #include <linux/omapfb.h> +#include <linux/platform_data/keypad-omap.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/mux.h> +#include "tc.h" +#include "mux.h" #include "flash.h" -#include <mach/tc.h> -#include <linux/platform_data/keypad-omap.h> - -#include <mach/hardware.h> -#include <mach/usb.h> - +#include "hardware.h" +#include "usb.h" #include "iomap.h" #include "common.h" #include "mmc.h" @@ -194,6 +192,9 @@ static struct platform_device innovator1510_smc91x_device = { static struct platform_device innovator1510_lcd_device = { .name = "lcd_inn1510", .id = -1, + .dev = { + .platform_data = (void __force *)OMAP1510_FPGA_LCD_PANEL_CONTROL, + } }; static struct platform_device innovator1510_spi_device = { @@ -287,6 +288,23 @@ static void __init innovator_init_smc91x(void) } #ifdef CONFIG_ARCH_OMAP15XX +/* + * Board specific gang-switched transceiver power on/off. + */ +static int innovator_omap_ohci_transceiver_power(int on) +{ + if (on) + __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) + | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), + INNOVATOR_FPGA_CAM_USB_CONTROL); + else + __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) + & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), + INNOVATOR_FPGA_CAM_USB_CONTROL); + + return 0; +} + static struct omap_usb_config innovator1510_usb_config __initdata = { /* for bundled non-standard host and peripheral cables */ .hmc_mode = 4, @@ -297,6 +315,8 @@ static struct omap_usb_config innovator1510_usb_config __initdata = { .register_dev = 1, .pins[0] = 2, + + .transceiver_power = innovator_omap_ohci_transceiver_power, }; static const struct omap_lcd_config innovator1510_lcd_config __initconst = { diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 11511ae2e0a2..8e0e58495023 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -28,11 +28,9 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/mux.h> - -#include <mach/hardware.h> -#include <mach/usb.h> - +#include "mux.h" +#include "hardware.h" +#include "usb.h" #include "common.h" #include "clock.h" #include "mmc.h" diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index e18b6f13300e..76684b7a4e87 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -42,18 +42,17 @@ #include <linux/mfd/tps65010.h> #include <linux/platform_data/gpio-omap.h> #include <linux/platform_data/omap1_bl.h> +#include <linux/soc/ti/omap1-io.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> +#include "tc.h" #include "flash.h" -#include <mach/mux.h> -#include <mach/tc.h> - -#include <mach/hardware.h> -#include <mach/usb.h> - +#include "mux.h" +#include "hardware.h" +#include "usb.h" #include "common.h" /* Name of the GPIO chip used by the OMAP for GPIOs 0..15 */ @@ -153,14 +152,14 @@ static struct resource osk5912_cf_resources[] = { [0] = { .flags = IORESOURCE_IRQ, }, + [1] = { + .flags = IORESOURCE_MEM, + }, }; static struct platform_device osk5912_cf_device = { .name = "omap_cf", .id = -1, - .dev = { - .platform_data = (void *) 2 /* CS2 */, - }, .num_resources = ARRAY_SIZE(osk5912_cf_resources), .resource = osk5912_cf_resources, }; @@ -275,13 +274,41 @@ static void __init osk_init_smc91x(void) omap_writel(l, EMIFS_CCS(1)); } -static void __init osk_init_cf(void) +static void __init osk_init_cf(int seg) { + struct resource *res = &osk5912_cf_resources[1]; + omap_cfg_reg(M7_1610_GPIO62); if ((gpio_request(62, "cf_irq")) < 0) { printk("Error requesting gpio 62 for CF irq\n"); return; } + + switch (seg) { + /* NOTE: CS0 could be configured too ... */ + case 1: + res->start = OMAP_CS1_PHYS; + break; + case 2: + res->start = OMAP_CS2_PHYS; + break; + case 3: + res->start = omap_cs3_phys(); + break; + } + + res->end = res->start + SZ_8K - 1; + osk5912_cf_device.dev.platform_data = (void *)(uintptr_t)seg; + + /* NOTE: better EMIFS setup might support more cards; but the + * TRM only shows how to affect regular flash signals, not their + * CF/PCMCIA variants... + */ + pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", __func__, + seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg))); + omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */ + omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */ + /* the CF I/O IRQ is really active-low */ irq_set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING); } @@ -580,7 +607,7 @@ static void __init osk_init(void) u32 l; osk_init_smc91x(); - osk_init_cf(); + osk_init_cf(2); /* CS2 */ /* Workaround for wrong CS3 (NOR flash) timing * There are some U-Boot versions out there which configure diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index ce6f0fcd9d12..72e1979c7a8b 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -25,21 +25,19 @@ #include <linux/interrupt.h> #include <linux/apm-emulation.h> #include <linux/omapfb.h> +#include <linux/omap-dma.h> +#include <linux/platform_data/keypad-omap.h> #include <linux/platform_data/omap1_bl.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> +#include "tc.h" #include "flash.h" -#include <mach/mux.h> -#include <mach/tc.h> -#include <linux/omap-dma.h> -#include <linux/platform_data/keypad-omap.h> - -#include <mach/hardware.h> -#include <mach/usb.h> - +#include "mux.h" +#include "hardware.h" +#include "usb.h" #include "mmc.h" #include "common.h" diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 8a08311c4e05..537f0e6a2ff7 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -24,22 +24,20 @@ #include <linux/omapfb.h> #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> +#include <linux/omap-dma.h> #include <linux/platform_data/omap1_bl.h> #include <linux/platform_data/leds-omap.h> +#include <linux/platform_data/keypad-omap.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> +#include "tc.h" #include "flash.h" -#include <mach/mux.h> -#include <linux/omap-dma.h> -#include <mach/tc.h> -#include <linux/platform_data/keypad-omap.h> - -#include <mach/hardware.h> -#include <mach/usb.h> - +#include "mux.h" +#include "hardware.h" +#include "usb.h" #include "common.h" #define PALMTT_USBDETECT_GPIO 0 diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 034e5bc6a029..47f08ae5a2f3 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -28,20 +28,18 @@ #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> #include <linux/platform_data/omap1_bl.h> +#include <linux/platform_data/keypad-omap.h> +#include <linux/omap-dma.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> +#include "tc.h" #include "flash.h" -#include <mach/mux.h> -#include <linux/omap-dma.h> -#include <mach/tc.h> -#include <linux/platform_data/keypad-omap.h> - -#include <mach/hardware.h> -#include <mach/usb.h> - +#include "mux.h" +#include "hardware.h" +#include "usb.h" #include "common.h" #define PALMZ71_USBDETECT_GPIO 0 diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 1aeeb7337d29..b041e6f6e9cf 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -19,17 +19,16 @@ #include <linux/smc91x.h> #include <linux/omapfb.h> #include <linux/platform_data/keypad-omap.h> +#include <linux/soc/ti/omap1-io.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/tc.h> -#include <mach/mux.h> +#include "tc.h" +#include "mux.h" #include "flash.h" - -#include <mach/hardware.h> - +#include "hardware.h" #include "iomap.h" #include "common.h" #include "fpga.h" @@ -289,6 +288,12 @@ static void __init omap_perseus2_init(void) omap_cfg_reg(F4_7XX_KBC3); omap_cfg_reg(E3_7XX_KBC4); + if (IS_ENABLED(CONFIG_SPI_OMAP_UWIRE)) { + /* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */ + int val = omap_readl(OMAP7XX_IO_CONF_9) & ~0x00EEE000; + omap_writel(val | 0x00AAA000, OMAP7XX_IO_CONF_9); + } + platform_add_devices(devices, ARRAY_SIZE(devices)); omap_serial_init(); diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c index 6192b1da75cb..f1c160924dfe 100644 --- a/arch/arm/mach-omap1/board-sx1-mmc.c +++ b/arch/arm/mach-omap1/board-sx1-mmc.c @@ -12,9 +12,8 @@ #include <linux/gpio.h> #include <linux/platform_device.h> -#include <mach/hardware.h> +#include "hardware.h" #include "board-sx1.h" - #include "mmc.h" #if IS_ENABLED(CONFIG_MMC_OMAP) diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index bb9ec345e204..f0dbb0e8d8e7 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -26,20 +26,18 @@ #include <linux/export.h> #include <linux/omapfb.h> #include <linux/platform_data/keypad-omap.h> +#include <linux/omap-dma.h> +#include "tc.h" #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include "flash.h" -#include <mach/mux.h> -#include <linux/omap-dma.h> -#include <mach/tc.h> +#include "mux.h" #include "board-sx1.h" - -#include <mach/hardware.h> -#include <mach/usb.h> - +#include "hardware.h" +#include "usb.h" #include "common.h" /* Write to I2C device */ diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 9d4a0ab50a46..e5bd4d3b742d 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -16,11 +16,11 @@ #include <linux/io.h> #include <linux/clk.h> #include <linux/clkdev.h> +#include <linux/soc/ti/omap1-io.h> #include <asm/mach-types.h> -#include <mach/hardware.h> - +#include "hardware.h" #include "soc.h" #include "iomap.h" #include "clock.h" @@ -41,7 +41,7 @@ static DEFINE_SPINLOCK(clockfw_lock); unsigned long omap1_uart_recalc(struct clk *clk) { unsigned int val = __raw_readl(clk->enable_reg); - return val & clk->enable_bit ? 48000000 : 12000000; + return val & 1 << clk->enable_bit ? 48000000 : 12000000; } unsigned long omap1_sossi_recalc(struct clk *clk) @@ -734,17 +734,6 @@ unsigned long omap_fixed_divisor_recalc(struct clk *clk) return clk->parent->rate / clk->fixed_div; } -void clk_reparent(struct clk *child, struct clk *parent) -{ - list_del_init(&child->sibling); - if (parent) - list_add(&child->sibling, &parent->children); - child->parent = parent; - - /* now do the debugfs renaming to reattach the child - to the proper parent */ -} - /* Propagate rate to children */ void propagate_rate(struct clk *tclk) { @@ -760,24 +749,6 @@ void propagate_rate(struct clk *tclk) static LIST_HEAD(root_clks); /** - * recalculate_root_clocks - recalculate and propagate all root clocks - * - * Recalculates all root clocks (clocks with no parent), which if the - * clock's .recalc is set correctly, should also propagate their rates. - * Called at init. - */ -void recalculate_root_clocks(void) -{ - struct clk *clkp; - - list_for_each_entry(clkp, &root_clks, sibling) { - if (clkp->recalc) - clkp->rate = clkp->recalc(clkp); - propagate_rate(clkp); - } -} - -/** * clk_preinit - initialize any fields in the struct clk before clk init * @clk: struct clk * to initialize * @@ -827,74 +798,6 @@ void clk_unregister(struct clk *clk) } EXPORT_SYMBOL(clk_unregister); -void clk_enable_init_clocks(void) -{ - struct clk *clkp; - - list_for_each_entry(clkp, &clocks, node) - if (clkp->flags & ENABLE_ON_INIT) - clk_enable(clkp); -} - -/** - * omap_clk_get_by_name - locate OMAP struct clk by its name - * @name: name of the struct clk to locate - * - * Locate an OMAP struct clk by its name. Assumes that struct clk - * names are unique. Returns NULL if not found or a pointer to the - * struct clk if found. - */ -struct clk *omap_clk_get_by_name(const char *name) -{ - struct clk *c; - struct clk *ret = NULL; - - mutex_lock(&clocks_mutex); - - list_for_each_entry(c, &clocks, node) { - if (!strcmp(c->name, name)) { - ret = c; - break; - } - } - - mutex_unlock(&clocks_mutex); - - return ret; -} - -int omap_clk_enable_autoidle_all(void) -{ - struct clk *c; - unsigned long flags; - - spin_lock_irqsave(&clockfw_lock, flags); - - list_for_each_entry(c, &clocks, node) - if (c->ops->allow_idle) - c->ops->allow_idle(c); - - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} - -int omap_clk_disable_autoidle_all(void) -{ - struct clk *c; - unsigned long flags; - - spin_lock_irqsave(&clockfw_lock, flags); - - list_for_each_entry(c, &clocks, node) - if (c->ops->deny_idle) - c->ops->deny_idle(c); - - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} - /* * Low level helpers */ @@ -952,7 +855,6 @@ static int __init clk_disable_unused(void) return 0; } late_initcall(clk_disable_unused); -late_initcall(omap_clk_enable_autoidle_all); #endif #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index f3b8811f5ac0..8025e4a22469 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h @@ -43,56 +43,26 @@ struct omap_clk { /* Temporary, needed during the common clock framework conversion */ #define __clk_get_name(clk) (clk->name) -#define __clk_get_parent(clk) (clk->parent) -#define __clk_get_rate(clk) (clk->rate) /** * struct clkops - some clock function pointers * @enable: fn ptr that enables the current clock in hardware * @disable: fn ptr that enables the current clock in hardware - * @find_idlest: function returning the IDLEST register for the clock's IP blk - * @find_companion: function returning the "companion" clk reg for the clock * @allow_idle: fn ptr that enables autoidle for the current clock in hardware - * @deny_idle: fn ptr that disables autoidle for the current clock in hardware - * - * A "companion" clk is an accompanying clock to the one being queried - * that must be enabled for the IP module connected to the clock to - * become accessible by the hardware. Neither @find_idlest nor - * @find_companion should be needed; that information is IP - * block-specific; the hwmod code has been created to handle this, but - * until hwmod data is ready and drivers have been converted to use PM - * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and - * @find_companion must, unfortunately, remain. */ struct clkops { int (*enable)(struct clk *); void (*disable)(struct clk *); - void (*find_idlest)(struct clk *, void __iomem **, - u8 *, u8 *); - void (*find_companion)(struct clk *, void __iomem **, - u8 *); - void (*allow_idle)(struct clk *); - void (*deny_idle)(struct clk *); }; /* * struct clk.flags possibilities * * XXX document the rest of the clock flags here - * - * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL - * bits share the same register. This flag allows the - * omap4_dpllmx*() code to determine which GATE_CTRL bit field - * should be used. This is a temporary solution - a better approach - * would be to associate clock type-specific data with the clock, - * similar to the struct dpll_data approach. */ #define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ #define CLOCK_IDLE_CONTROL (1 << 1) #define CLOCK_NO_IDLE_PARENT (1 << 2) -#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */ -#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ -#define CLOCK_CLKOUTX2 (1 << 5) /** * struct clk - OMAP struct clk @@ -113,9 +83,8 @@ struct clkops { * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div * @flags: see "struct clk.flags possibilities" above * @rate_offset: bitshift for rate selection bitfield (OMAP1 only) - * @src_offset: bitshift for source selection bitfield (OMAP1 only) * - * XXX @rate_offset, @src_offset should probably be removed and OMAP1 + * XXX @rate_offset should probably be removed and OMAP1 * clock code converted to use clksel. * * XXX @usecount is poorly named. It should be "enable_count" or @@ -126,7 +95,7 @@ struct clkops { * clocks and decremented by the clock code when clk_disable() is * called on child clocks. * - * XXX @clkdm, @usecount, @children, @sibling should be marked for + * XXX @usecount, @children, @sibling should be marked for * internal use only. * * @children and @sibling are used to optimize parent-to-child clock @@ -153,36 +122,17 @@ struct clk { u8 fixed_div; u8 flags; u8 rate_offset; - u8 src_offset; #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) struct dentry *dent; /* For visible tree hierarchy */ #endif }; -struct clk_functions { - int (*clk_enable)(struct clk *clk); - void (*clk_disable)(struct clk *clk); - long (*clk_round_rate)(struct clk *clk, unsigned long rate); - int (*clk_set_rate)(struct clk *clk, unsigned long rate); - int (*clk_set_parent)(struct clk *clk, struct clk *parent); - void (*clk_allow_idle)(struct clk *clk); - void (*clk_deny_idle)(struct clk *clk); - void (*clk_disable_unused)(struct clk *clk); -}; - -extern int clk_init(struct clk_functions *custom_clocks); extern void clk_preinit(struct clk *clk); extern int clk_register(struct clk *clk); -extern void clk_reparent(struct clk *child, struct clk *parent); extern void clk_unregister(struct clk *clk); extern void propagate_rate(struct clk *clk); -extern void recalculate_root_clocks(void); extern unsigned long followparent_recalc(struct clk *clk); -extern void clk_enable_init_clocks(void); unsigned long omap_fixed_divisor_recalc(struct clk *clk); -extern struct clk *omap_clk_get_by_name(const char *name); -extern int omap_clk_enable_autoidle_all(void); -extern int omap_clk_disable_autoidle_all(void); extern const struct clkops clkops_null; @@ -208,7 +158,6 @@ extern int omap1_select_table_rate(struct clk *clk, unsigned long rate); extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate); extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate); extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate); -extern unsigned long omap1_watchdog_recalc(struct clk *clk); #ifdef CONFIG_OMAP_RESET_CLOCKS extern void omap1_clk_disable_unused(struct clk *clk); @@ -278,7 +227,6 @@ extern __u32 arm_idlect1_mask; extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; extern const struct clkops clkops_dspck; -extern const struct clkops clkops_dummy; extern const struct clkops clkops_uart_16xx; extern const struct clkops clkops_generic; diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 3ebcd96efbff..165b6a75a59b 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -16,14 +16,13 @@ #include <linux/clk.h> #include <linux/cpufreq.h> #include <linux/delay.h> +#include <linux/soc/ti/omap1-io.h> #include <asm/mach-types.h> /* for machine_is_* */ #include "soc.h" - -#include <mach/hardware.h> -#include <mach/usb.h> /* for OTG_BASE */ - +#include "hardware.h" +#include "usb.h" /* for OTG_BASE */ #include "iomap.h" #include "clock.h" #include "sram.h" @@ -93,8 +92,7 @@ static struct arm_idlect1_clk ck_dpll1out = { .name = "ck_dpll1out", .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT | - ENABLE_ON_INIT, + .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_CKOUT_ARM, .recalc = &followparent_recalc, @@ -147,7 +145,6 @@ static struct clk arm_gpio_ck = { .name = "ick", .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = ENABLE_ON_INIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_GPIOCK, .recalc = &followparent_recalc, @@ -317,7 +314,6 @@ static struct clk tc2_ck = { .name = "tc2_ck", .ops = &clkops_generic, .parent = &tc_ck.clk, - .flags = ENABLE_ON_INIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC2_CK, .recalc = &followparent_recalc, @@ -763,15 +759,14 @@ u32 cpu_mask; int __init omap1_clk_init(void) { struct omap_clk *c; - int crystal_type = 0; /* Default 12 MHz */ u32 reg; #ifdef CONFIG_DEBUG_LL - /* - * Resets some clocks that may be left on from bootloader, - * but leaves serial clocks on. - */ - omap_writel(0x3 << 29, MOD_CONF_CTRL_0); + /* Make sure UART clocks are enabled early */ + if (cpu_is_omap16xx()) + omap_writel(omap_readl(MOD_CONF_CTRL_0) | + CONF_MOD_UART1_CLK_MODE_R | + CONF_MOD_UART3_CLK_MODE_R, MOD_CONF_CTRL_0); #endif /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */ @@ -811,14 +806,12 @@ int __init omap1_clk_init(void) if (cpu_is_omap7xx()) ck_ref.rate = 13000000; - if (cpu_is_omap16xx() && crystal_type == 2) - ck_ref.rate = 19200000; pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n", omap_readw(ARM_SYSST), omap_readw(DPLL_CTL), omap_readw(ARM_CKCTL)); - /* We want to be in syncronous scalable mode */ + /* We want to be in synchronous scalable mode */ omap_writew(0x1000, ARM_SYSST); diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h index 504b959ba5cf..5ceff05e15c0 100644 --- a/arch/arm/mach-omap1/common.h +++ b/arch/arm/mach-omap1/common.h @@ -31,8 +31,7 @@ #include <asm/exception.h> -#include <mach/irqs.h> - +#include "irqs.h" #include "soc.h" #include "i2c.h" diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index eb0f09edb3d1..80e94770582a 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -14,15 +14,15 @@ #include <linux/spi/spi.h> #include <linux/platform_data/omap-wd-timer.h> +#include <linux/soc/ti/omap1-io.h> #include <asm/mach/map.h> -#include <mach/tc.h> -#include <mach/mux.h> - -#include <mach/omap7xx.h> -#include <mach/hardware.h> +#include "tc.h" +#include "mux.h" +#include "omap7xx.h" +#include "hardware.h" #include "common.h" #include "clock.h" #include "mmc.h" @@ -356,7 +356,7 @@ static int __init omap1_init_devices(void) if (!cpu_class_is_omap1()) return -ENODEV; - omap_sram_init(); + omap1_sram_init(); omap1_clk_late_init(); /* please keep these calls, and their implementations above, diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c index 2bf659fb6099..c3f280c3c5d7 100644 --- a/arch/arm/mach-omap1/dma.c +++ b/arch/arm/mach-omap1/dma.c @@ -24,7 +24,7 @@ #include <linux/dma-mapping.h> #include <linux/dmaengine.h> #include <linux/omap-dma.h> -#include <mach/tc.h> +#include "tc.h" #include "soc.h" diff --git a/arch/arm/mach-omap1/fb.c b/arch/arm/mach-omap1/fb.c index 0e32a959f254..a4538c231f66 100644 --- a/arch/arm/mach-omap1/fb.c +++ b/arch/arm/mach-omap1/fb.c @@ -17,9 +17,12 @@ #include <linux/io.h> #include <linux/omapfb.h> #include <linux/dma-mapping.h> +#include <linux/irq.h> #include <asm/mach/map.h> +#include "irqs.h" + #if IS_ENABLED(CONFIG_FB_OMAP) static bool omapfb_lcd_configured; @@ -27,6 +30,19 @@ static struct omapfb_platform_data omapfb_config; static u64 omap_fb_dma_mask = ~(u32)0; +struct resource omap_fb_resources[] = { + { + .name = "irq", + .start = INT_LCD_CTRL, + .flags = IORESOURCE_IRQ, + }, + { + .name = "irq", + .start = INT_SOSSI_MATCH, + .flags = IORESOURCE_IRQ, + }, +}; + static struct platform_device omap_fb_device = { .name = "omapfb", .id = -1, @@ -35,7 +51,8 @@ static struct platform_device omap_fb_device = { .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &omapfb_config, }, - .num_resources = 0, + .num_resources = ARRAY_SIZE(omap_fb_resources), + .resource = omap_fb_resources, }; void __init omapfb_set_lcd_config(const struct omap_lcd_config *config) diff --git a/arch/arm/mach-omap1/flash.c b/arch/arm/mach-omap1/flash.c index 40e43ce5329f..0a3ddb3b66eb 100644 --- a/arch/arm/mach-omap1/flash.c +++ b/arch/arm/mach-omap1/flash.c @@ -6,11 +6,12 @@ #include <linux/io.h> #include <linux/mtd/mtd.h> #include <linux/mtd/map.h> +#include <linux/soc/ti/omap1-io.h> + +#include "tc.h" -#include <mach/tc.h> #include "flash.h" -#include <mach/hardware.h> void omap1_set_vpp(struct platform_device *pdev, int enable) { diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index f03ed523f20f..4c71a195969f 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c @@ -24,8 +24,7 @@ #include <asm/irq.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> - +#include "hardware.h" #include "iomap.h" #include "common.h" #include "fpga.h" diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c index 3ec08bd5d8a0..3faf2b7c2d09 100644 --- a/arch/arm/mach-omap1/gpio15xx.c +++ b/arch/arm/mach-omap1/gpio15xx.c @@ -18,8 +18,9 @@ #include <linux/gpio.h> #include <linux/platform_data/gpio-omap.h> +#include <linux/soc/ti/omap1-soc.h> -#include <mach/irqs.h> +#include "irqs.h" #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE #define OMAP1510_GPIO_BASE 0xFFFCE000 diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c index 500cfd416c42..2a25751007d4 100644 --- a/arch/arm/mach-omap1/gpio16xx.c +++ b/arch/arm/mach-omap1/gpio16xx.c @@ -18,9 +18,10 @@ #include <linux/gpio.h> #include <linux/platform_data/gpio-omap.h> +#include <linux/soc/ti/omap1-io.h> -#include <mach/irqs.h> - +#include "hardware.h" +#include "irqs.h" #include "soc.h" #define OMAP1610_GPIO1_BASE 0xfffbe400 diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c index aeb81c18ffcc..46b7d5d4d255 100644 --- a/arch/arm/mach-omap1/gpio7xx.c +++ b/arch/arm/mach-omap1/gpio7xx.c @@ -19,8 +19,7 @@ #include <linux/gpio.h> #include <linux/platform_data/gpio-omap.h> -#include <mach/irqs.h> - +#include "irqs.h" #include "soc.h" #define OMAP7XX_GPIO1_BASE 0xfffbc000 diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/hardware.h index e7c8ac7d83e3..738becbd2972 100644 --- a/arch/arm/mach-omap1/include/mach/hardware.h +++ b/arch/arm/mach-omap1/hardware.h @@ -1,6 +1,4 @@ /* - * arch/arm/mach-omap1/include/mach/hardware.h - * * Hardware definitions for TI OMAP processors and boards * * NOTE: Please put device driver specific defines into a separate header @@ -37,21 +35,12 @@ #define __ASM_ARCH_OMAP_HARDWARE_H #include <linux/sizes.h> +#include <linux/soc/ti/omap1-io.h> #ifndef __ASSEMBLER__ #include <asm/types.h> -#include <mach/soc.h> +#include <linux/soc/ti/omap1-soc.h> -/* - * NOTE: Please use ioremap + __raw_read/write where possible instead of these - */ -extern u8 omap_readb(u32 pa); -extern u16 omap_readw(u32 pa); -extern u32 omap_readl(u32 pa); -extern void omap_writeb(u8 v, u32 pa); -extern void omap_writew(u16 v, u32 pa); -extern void omap_writel(u32 v, u32 pa); - -#include <mach/tc.h> +#include "tc.h" /* Almost all documentation for chip and board memory maps assumes * BM is clear. Most devel boards have a switch to control booting @@ -72,7 +61,7 @@ static inline u32 omap_cs3_phys(void) #endif /* ifndef __ASSEMBLER__ */ -#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ +#define OMAP1_IO_OFFSET 0x00f00000 /* Virtual IO = 0xff0b0000 */ #define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) #include <mach/serial.h> @@ -99,66 +88,6 @@ static inline u32 omap_cs3_phys(void) #define MPU_TIMER_ST (1 << 0) /* - * ---------------------------------------------------------------------------- - * Clocks - * ---------------------------------------------------------------------------- - */ -#define CLKGEN_REG_BASE (0xfffece00) -#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) -#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) -#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) -#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC) -#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10) -#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14) -#define ARM_SYSST (CLKGEN_REG_BASE + 0x18) -#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) - -#define CK_RATEF 1 -#define CK_IDLEF 2 -#define CK_ENABLEF 4 -#define CK_SELECTF 8 -#define SETARM_IDLE_SHIFT - -/* DPLL control registers */ -#define DPLL_CTL (0xfffecf00) - -/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ -#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000) -#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) -#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) -#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) -#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14) - -/* - * --------------------------------------------------------------------------- - * UPLD - * --------------------------------------------------------------------------- - */ -#define ULPD_REG_BASE (0xfffe0800) -#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) -#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) -#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) -# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */ -# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */ -#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) -# define SOFT_UDC_REQ (1 << 4) -# define SOFT_USB_CLK_REQ (1 << 3) -# define SOFT_DPLL_REQ (1 << 0) -#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) -#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) -#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) -#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) -#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68) -# define DIS_MMC2_DPLL_REQ (1 << 11) -# define DIS_MMC1_DPLL_REQ (1 << 10) -# define DIS_UART3_DPLL_REQ (1 << 9) -# define DIS_UART2_DPLL_REQ (1 << 8) -# define DIS_UART1_DPLL_REQ (1 << 7) -# define DIS_USB_HOST_DPLL_REQ (1 << 6) -#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74) -#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c) - -/* * --------------------------------------------------------------------------- * Watchdog timer * --------------------------------------------------------------------------- @@ -213,52 +142,6 @@ static inline u32 omap_cs3_phys(void) #endif -/* - * ---------------------------------------------------------------------------- - * System control registers - * ---------------------------------------------------------------------------- - */ -#define MOD_CONF_CTRL_0 0xfffe1080 -#define MOD_CONF_CTRL_1 0xfffe1110 - -/* - * ---------------------------------------------------------------------------- - * Pin multiplexing registers - * ---------------------------------------------------------------------------- - */ -#define FUNC_MUX_CTRL_0 0xfffe1000 -#define FUNC_MUX_CTRL_1 0xfffe1004 -#define FUNC_MUX_CTRL_2 0xfffe1008 -#define COMP_MODE_CTRL_0 0xfffe100c -#define FUNC_MUX_CTRL_3 0xfffe1010 -#define FUNC_MUX_CTRL_4 0xfffe1014 -#define FUNC_MUX_CTRL_5 0xfffe1018 -#define FUNC_MUX_CTRL_6 0xfffe101C -#define FUNC_MUX_CTRL_7 0xfffe1020 -#define FUNC_MUX_CTRL_8 0xfffe1024 -#define FUNC_MUX_CTRL_9 0xfffe1028 -#define FUNC_MUX_CTRL_A 0xfffe102C -#define FUNC_MUX_CTRL_B 0xfffe1030 -#define FUNC_MUX_CTRL_C 0xfffe1034 -#define FUNC_MUX_CTRL_D 0xfffe1038 -#define PULL_DWN_CTRL_0 0xfffe1040 -#define PULL_DWN_CTRL_1 0xfffe1044 -#define PULL_DWN_CTRL_2 0xfffe1048 -#define PULL_DWN_CTRL_3 0xfffe104c -#define PULL_DWN_CTRL_4 0xfffe10ac - -/* OMAP-1610 specific multiplexing registers */ -#define FUNC_MUX_CTRL_E 0xfffe1090 -#define FUNC_MUX_CTRL_F 0xfffe1094 -#define FUNC_MUX_CTRL_10 0xfffe1098 -#define FUNC_MUX_CTRL_11 0xfffe109c -#define FUNC_MUX_CTRL_12 0xfffe10a0 -#define PU_PD_SEL_0 0xfffe10b4 -#define PU_PD_SEL_1 0xfffe10b8 -#define PU_PD_SEL_2 0xfffe10bc -#define PU_PD_SEL_3 0xfffe10c0 -#define PU_PD_SEL_4 0xfffe10c4 - /* Timer32K for 1610 and 1710*/ #define OMAP_TIMER32K_BASE 0xFFFBC400 @@ -300,15 +183,6 @@ static inline u32 omap_cs3_phys(void) #define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04) /* - * ---------------------------------------------------------------------------- - * Pulse-Width Light - * ---------------------------------------------------------------------------- - */ -#define OMAP_PWL_BASE 0xfffb5800 -#define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00) -#define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04) - -/* * --------------------------------------------------------------------------- * Processor specific defines * --------------------------------------------------------------------------- diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c index 5e6d81b1624c..f574eb0bcc0b 100644 --- a/arch/arm/mach-omap1/i2c.c +++ b/arch/arm/mach-omap1/i2c.c @@ -7,7 +7,8 @@ #include <linux/i2c.h> #include <linux/platform_data/i2c-omap.h> -#include <mach/mux.h> + +#include "mux.h" #include "soc.h" #define OMAP_I2C_SIZE 0x3f diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c index 91556e374152..c3bb1b71fdf3 100644 --- a/arch/arm/mach-omap1/id.c +++ b/arch/arm/mach-omap1/id.c @@ -12,12 +12,11 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/io.h> +#include <linux/soc/ti/omap1-io.h> #include <asm/system_info.h> #include "soc.h" - -#include <mach/hardware.h> - +#include "hardware.h" #include "common.h" #define OMAP_DIE_ID_0 0xfffe1800 diff --git a/arch/arm/mach-omap1/include/mach/io.h b/arch/arm/mach-omap1/include/mach/io.h deleted file mode 100644 index ce4f8005b26f..000000000000 --- a/arch/arm/mach-omap1/include/mach/io.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * arch/arm/mach-omap1/include/mach/io.h - * - * IO definitions for TI OMAP processors and boards - * - * Copied from arch/arm/mach-sa1100/include/mach/io.h - * Copyright (C) 1997-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - * Modifications: - * 06-12-1997 RMK Created. - * 07-04-1999 RMK Major cleanup - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define __io(a) __typesafe_io(a) - -#endif diff --git a/arch/arm/mach-omap1/include/mach/lcd_dma.h b/arch/arm/mach-omap1/include/mach/lcd_dma.h deleted file mode 100644 index 1a3c0cf17899..000000000000 --- a/arch/arm/mach-omap1/include/mach/lcd_dma.h +++ /dev/null @@ -1,65 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * arch/arm/mach-omap1/include/mach/lcd_dma.h - * - * Extracted from arch/arm/plat-omap/include/plat/dma.h - * Copyright (C) 2003 Nokia Corporation - * Author: Juha Yrjölä <juha.yrjola@nokia.com> - */ -#ifndef __MACH_OMAP1_LCD_DMA_H__ -#define __MACH_OMAP1_LCD_DMA_H__ - -/* Hardware registers for LCD DMA */ -#define OMAP1510_DMA_LCD_BASE (0xfffedb00) -#define OMAP1510_DMA_LCD_CTRL (OMAP1510_DMA_LCD_BASE + 0x00) -#define OMAP1510_DMA_LCD_TOP_F1_L (OMAP1510_DMA_LCD_BASE + 0x02) -#define OMAP1510_DMA_LCD_TOP_F1_U (OMAP1510_DMA_LCD_BASE + 0x04) -#define OMAP1510_DMA_LCD_BOT_F1_L (OMAP1510_DMA_LCD_BASE + 0x06) -#define OMAP1510_DMA_LCD_BOT_F1_U (OMAP1510_DMA_LCD_BASE + 0x08) - -#define OMAP1610_DMA_LCD_BASE (0xfffee300) -#define OMAP1610_DMA_LCD_CSDP (OMAP1610_DMA_LCD_BASE + 0xc0) -#define OMAP1610_DMA_LCD_CCR (OMAP1610_DMA_LCD_BASE + 0xc2) -#define OMAP1610_DMA_LCD_CTRL (OMAP1610_DMA_LCD_BASE + 0xc4) -#define OMAP1610_DMA_LCD_TOP_B1_L (OMAP1610_DMA_LCD_BASE + 0xc8) -#define OMAP1610_DMA_LCD_TOP_B1_U (OMAP1610_DMA_LCD_BASE + 0xca) -#define OMAP1610_DMA_LCD_BOT_B1_L (OMAP1610_DMA_LCD_BASE + 0xcc) -#define OMAP1610_DMA_LCD_BOT_B1_U (OMAP1610_DMA_LCD_BASE + 0xce) -#define OMAP1610_DMA_LCD_TOP_B2_L (OMAP1610_DMA_LCD_BASE + 0xd0) -#define OMAP1610_DMA_LCD_TOP_B2_U (OMAP1610_DMA_LCD_BASE + 0xd2) -#define OMAP1610_DMA_LCD_BOT_B2_L (OMAP1610_DMA_LCD_BASE + 0xd4) -#define OMAP1610_DMA_LCD_BOT_B2_U (OMAP1610_DMA_LCD_BASE + 0xd6) -#define OMAP1610_DMA_LCD_SRC_EI_B1 (OMAP1610_DMA_LCD_BASE + 0xd8) -#define OMAP1610_DMA_LCD_SRC_FI_B1_L (OMAP1610_DMA_LCD_BASE + 0xda) -#define OMAP1610_DMA_LCD_SRC_EN_B1 (OMAP1610_DMA_LCD_BASE + 0xe0) -#define OMAP1610_DMA_LCD_SRC_FN_B1 (OMAP1610_DMA_LCD_BASE + 0xe4) -#define OMAP1610_DMA_LCD_LCH_CTRL (OMAP1610_DMA_LCD_BASE + 0xea) -#define OMAP1610_DMA_LCD_SRC_FI_B1_U (OMAP1610_DMA_LCD_BASE + 0xf4) - -/* LCD DMA block numbers */ -enum { - OMAP_LCD_DMA_B1_TOP, - OMAP_LCD_DMA_B1_BOTTOM, - OMAP_LCD_DMA_B2_TOP, - OMAP_LCD_DMA_B2_BOTTOM -}; - -/* LCD DMA functions */ -extern int omap_request_lcd_dma(void (*callback)(u16 status, void *data), - void *data); -extern void omap_free_lcd_dma(void); -extern void omap_setup_lcd_dma(void); -extern void omap_enable_lcd_dma(void); -extern void omap_stop_lcd_dma(void); -extern void omap_set_lcd_dma_ext_controller(int external); -extern void omap_set_lcd_dma_single_transfer(int single); -extern void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres, - int data_type); -extern void omap_set_lcd_dma_b1_rotation(int rotate); -extern void omap_set_lcd_dma_b1_vxres(unsigned long vxres); -extern void omap_set_lcd_dma_b1_mirror(int mirror); -extern void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale); - -extern int omap_lcd_dma_running(void); - -#endif /* __MACH_OMAP1_LCD_DMA_H__ */ diff --git a/arch/arm/mach-omap1/include/mach/lcdc.h b/arch/arm/mach-omap1/include/mach/lcdc.h deleted file mode 100644 index 7152db1f5361..000000000000 --- a/arch/arm/mach-omap1/include/mach/lcdc.h +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * arch/arm/mach-omap1/include/mach/lcdc.h - * - * Extracted from drivers/video/omap/lcdc.c - * Copyright (C) 2004 Nokia Corporation - * Author: Imre Deak <imre.deak@nokia.com> - */ -#ifndef __MACH_LCDC_H__ -#define __MACH_LCDC_H__ - -#define OMAP_LCDC_BASE 0xfffec000 -#define OMAP_LCDC_SIZE 256 -#define OMAP_LCDC_IRQ INT_LCD_CTRL - -#define OMAP_LCDC_CONTROL (OMAP_LCDC_BASE + 0x00) -#define OMAP_LCDC_TIMING0 (OMAP_LCDC_BASE + 0x04) -#define OMAP_LCDC_TIMING1 (OMAP_LCDC_BASE + 0x08) -#define OMAP_LCDC_TIMING2 (OMAP_LCDC_BASE + 0x0c) -#define OMAP_LCDC_STATUS (OMAP_LCDC_BASE + 0x10) -#define OMAP_LCDC_SUBPANEL (OMAP_LCDC_BASE + 0x14) -#define OMAP_LCDC_LINE_INT (OMAP_LCDC_BASE + 0x18) -#define OMAP_LCDC_DISPLAY_STATUS (OMAP_LCDC_BASE + 0x1c) - -#define OMAP_LCDC_STAT_DONE (1 << 0) -#define OMAP_LCDC_STAT_VSYNC (1 << 1) -#define OMAP_LCDC_STAT_SYNC_LOST (1 << 2) -#define OMAP_LCDC_STAT_ABC (1 << 3) -#define OMAP_LCDC_STAT_LINE_INT (1 << 4) -#define OMAP_LCDC_STAT_FUF (1 << 5) -#define OMAP_LCDC_STAT_LOADED_PALETTE (1 << 6) - -#define OMAP_LCDC_CTRL_LCD_EN (1 << 0) -#define OMAP_LCDC_CTRL_LCD_TFT (1 << 7) -#define OMAP_LCDC_CTRL_LINE_IRQ_CLR_SEL (1 << 10) - -#define OMAP_LCDC_IRQ_VSYNC (1 << 2) -#define OMAP_LCDC_IRQ_DONE (1 << 3) -#define OMAP_LCDC_IRQ_LOADED_PALETTE (1 << 4) -#define OMAP_LCDC_IRQ_LINE_NIRQ (1 << 5) -#define OMAP_LCDC_IRQ_LINE (1 << 6) -#define OMAP_LCDC_IRQ_MASK (((1 << 5) - 1) << 2) - -#endif /* __MACH_LCDC_H__ */ diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h deleted file mode 100644 index ba3a350479c8..000000000000 --- a/arch/arm/mach-omap1/include/mach/memory.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * arch/arm/mach-omap1/include/mach/memory.h - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* REVISIT: omap1 legacy drivers still rely on this */ -#include <mach/soc.h> - -#endif diff --git a/arch/arm/mach-omap1/include/mach/mux.h b/arch/arm/mach-omap1/include/mach/mux.h deleted file mode 100644 index 3f6dc55d9898..000000000000 --- a/arch/arm/mach-omap1/include/mach/mux.h +++ /dev/null @@ -1,441 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * arch/arm/plat-omap/include/mach/mux.h - * - * Table of the Omap register configurations for the FUNC_MUX and - * PULL_DWN combinations. - * - * Copyright (C) 2004 - 2008 Texas Instruments Inc. - * Copyright (C) 2003 - 2008 Nokia Corporation - * - * Written by Tony Lindgren - * - * NOTE: Please use the following naming style for new pin entries. - * For example, W8_1610_MMC2_DAT0, where: - * - W8 = ball - * - 1610 = 1510 or 1610, none if common for both 1510 and 1610 - * - MMC2_DAT0 = function - */ - -#ifndef __ASM_ARCH_MUX_H -#define __ASM_ARCH_MUX_H - -#define PU_PD_SEL_NA 0 /* No pu_pd reg available */ -#define PULL_DWN_CTRL_NA 0 /* No pull-down control needed */ - -#ifdef CONFIG_OMAP_MUX_DEBUG -#define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \ - .mux_reg = FUNC_MUX_CTRL_##reg, \ - .mask_offset = mode_offset, \ - .mask = mode, - -#define PULL_REG(reg, bit, status) .pull_name = "PULL_DWN_CTRL_"#reg, \ - .pull_reg = PULL_DWN_CTRL_##reg, \ - .pull_bit = bit, \ - .pull_val = status, - -#define PU_PD_REG(reg, status) .pu_pd_name = "PU_PD_SEL_"#reg, \ - .pu_pd_reg = PU_PD_SEL_##reg, \ - .pu_pd_val = status, - -#define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \ - .mux_reg = OMAP7XX_IO_CONF_##reg, \ - .mask_offset = mode_offset, \ - .mask = mode, - -#define PULL_REG_7XX(reg, bit, status) .pull_name = "OMAP7XX_IO_CONF_"#reg, \ - .pull_reg = OMAP7XX_IO_CONF_##reg, \ - .pull_bit = bit, \ - .pull_val = status, - -#else - -#define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \ - .mask_offset = mode_offset, \ - .mask = mode, - -#define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, \ - .pull_bit = bit, \ - .pull_val = status, - -#define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \ - .pu_pd_val = status, - -#define MUX_REG_7XX(reg, mode_offset, mode) \ - .mux_reg = OMAP7XX_IO_CONF_##reg, \ - .mask_offset = mode_offset, \ - .mask = mode, - -#define PULL_REG_7XX(reg, bit, status) .pull_reg = OMAP7XX_IO_CONF_##reg, \ - .pull_bit = bit, \ - .pull_val = status, - -#endif /* CONFIG_OMAP_MUX_DEBUG */ - -#define MUX_CFG(desc, mux_reg, mode_offset, mode, \ - pull_reg, pull_bit, pull_status, \ - pu_pd_reg, pu_pd_status, debug_status) \ -{ \ - .name = desc, \ - .debug = debug_status, \ - MUX_REG(mux_reg, mode_offset, mode) \ - PULL_REG(pull_reg, pull_bit, pull_status) \ - PU_PD_REG(pu_pd_reg, pu_pd_status) \ -}, - - -/* - * OMAP730/850 has a slightly different config for the pin mux. - * - config regs are the OMAP7XX_IO_CONF_x regs (see omap7xx.h) regs and - * not the FUNC_MUX_CTRL_x regs from hardware.h - * - for pull-up/down, only has one enable bit which is in the same register - * as mux config - */ -#define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \ - pull_bit, pull_status, debug_status)\ -{ \ - .name = desc, \ - .debug = debug_status, \ - MUX_REG_7XX(mux_reg, mode_offset, mode) \ - PULL_REG_7XX(mux_reg, pull_bit, pull_status) \ - PU_PD_REG(NA, 0) \ -}, - -struct pin_config { - char *name; - const unsigned int mux_reg; - unsigned char debug; - - const unsigned char mask_offset; - const unsigned char mask; - - const char *pull_name; - const unsigned int pull_reg; - const unsigned char pull_val; - const unsigned char pull_bit; - - const char *pu_pd_name; - const unsigned int pu_pd_reg; - const unsigned char pu_pd_val; - -#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) - const char *mux_reg_name; -#endif - -}; - -enum omap7xx_index { - /* OMAP 730 keyboard */ - E2_7XX_KBR0, - J7_7XX_KBR1, - E1_7XX_KBR2, - F3_7XX_KBR3, - D2_7XX_KBR4, - C2_7XX_KBC0, - D3_7XX_KBC1, - E4_7XX_KBC2, - F4_7XX_KBC3, - E3_7XX_KBC4, - - /* USB */ - AA17_7XX_USB_DM, - W16_7XX_USB_PU_EN, - W17_7XX_USB_VBUSI, - W18_7XX_USB_DMCK_OUT, - W19_7XX_USB_DCRST, - - /* MMC */ - MMC_7XX_CMD, - MMC_7XX_CLK, - MMC_7XX_DAT0, - - /* I2C */ - I2C_7XX_SCL, - I2C_7XX_SDA, - - /* SPI */ - SPI_7XX_1, - SPI_7XX_2, - SPI_7XX_3, - SPI_7XX_4, - SPI_7XX_5, - SPI_7XX_6, - - /* UART */ - UART_7XX_1, - UART_7XX_2, -}; - -enum omap1xxx_index { - /* UART1 (BT_UART_GATING)*/ - UART1_TX = 0, - UART1_RTS, - - /* UART2 (COM_UART_GATING)*/ - UART2_TX, - UART2_RX, - UART2_CTS, - UART2_RTS, - - /* UART3 (GIGA_UART_GATING) */ - UART3_TX, - UART3_RX, - UART3_CTS, - UART3_RTS, - UART3_CLKREQ, - UART3_BCLK, /* 12MHz clock out */ - Y15_1610_UART3_RTS, - - /* PWT & PWL */ - PWT, - PWL, - - /* USB master generic */ - R18_USB_VBUS, - R18_1510_USB_GPIO0, - W4_USB_PUEN, - W4_USB_CLKO, - W4_USB_HIGHZ, - W4_GPIO58, - - /* USB1 master */ - USB1_SUSP, - USB1_SEO, - W13_1610_USB1_SE0, - USB1_TXEN, - USB1_TXD, - USB1_VP, - USB1_VM, - USB1_RCV, - USB1_SPEED, - R13_1610_USB1_SPEED, - R13_1710_USB1_SE0, - - /* USB2 master */ - USB2_SUSP, - USB2_VP, - USB2_TXEN, - USB2_VM, - USB2_RCV, - USB2_SEO, - USB2_TXD, - - /* OMAP-1510 GPIO */ - R18_1510_GPIO0, - R19_1510_GPIO1, - M14_1510_GPIO2, - - /* OMAP1610 GPIO */ - P18_1610_GPIO3, - Y15_1610_GPIO17, - - /* OMAP-1710 GPIO */ - R18_1710_GPIO0, - V2_1710_GPIO10, - N21_1710_GPIO14, - W15_1710_GPIO40, - - /* MPUIO */ - MPUIO2, - N15_1610_MPUIO2, - MPUIO4, - MPUIO5, - T20_1610_MPUIO5, - W11_1610_MPUIO6, - V10_1610_MPUIO7, - W11_1610_MPUIO9, - V10_1610_MPUIO10, - W10_1610_MPUIO11, - E20_1610_MPUIO13, - U20_1610_MPUIO14, - E19_1610_MPUIO15, - - /* MCBSP2 */ - MCBSP2_CLKR, - MCBSP2_CLKX, - MCBSP2_DR, - MCBSP2_DX, - MCBSP2_FSR, - MCBSP2_FSX, - - /* MCBSP3 */ - MCBSP3_CLKX, - - /* Misc ballouts */ - BALLOUT_V8_ARMIO3, - N20_HDQ, - - /* OMAP-1610 MMC2 */ - W8_1610_MMC2_DAT0, - V8_1610_MMC2_DAT1, - W15_1610_MMC2_DAT2, - R10_1610_MMC2_DAT3, - Y10_1610_MMC2_CLK, - Y8_1610_MMC2_CMD, - V9_1610_MMC2_CMDDIR, - V5_1610_MMC2_DATDIR0, - W19_1610_MMC2_DATDIR1, - R18_1610_MMC2_CLKIN, - - /* OMAP-1610 External Trace Interface */ - M19_1610_ETM_PSTAT0, - L15_1610_ETM_PSTAT1, - L18_1610_ETM_PSTAT2, - L19_1610_ETM_D0, - J19_1610_ETM_D6, - J18_1610_ETM_D7, - - /* OMAP16XX GPIO */ - P20_1610_GPIO4, - V9_1610_GPIO7, - W8_1610_GPIO9, - N20_1610_GPIO11, - N19_1610_GPIO13, - P10_1610_GPIO22, - V5_1610_GPIO24, - AA20_1610_GPIO_41, - W19_1610_GPIO48, - M7_1610_GPIO62, - V14_16XX_GPIO37, - R9_16XX_GPIO18, - L14_16XX_GPIO49, - - /* OMAP-1610 uWire */ - V19_1610_UWIRE_SCLK, - U18_1610_UWIRE_SDI, - W21_1610_UWIRE_SDO, - N14_1610_UWIRE_CS0, - P15_1610_UWIRE_CS3, - N15_1610_UWIRE_CS1, - - /* OMAP-1610 SPI */ - U19_1610_SPIF_SCK, - U18_1610_SPIF_DIN, - P20_1610_SPIF_DIN, - W21_1610_SPIF_DOUT, - R18_1610_SPIF_DOUT, - N14_1610_SPIF_CS0, - N15_1610_SPIF_CS1, - T19_1610_SPIF_CS2, - P15_1610_SPIF_CS3, - - /* OMAP-1610 Flash */ - L3_1610_FLASH_CS2B_OE, - M8_1610_FLASH_CS2B_WE, - - /* First MMC */ - MMC_CMD, - MMC_DAT1, - MMC_DAT2, - MMC_DAT0, - MMC_CLK, - MMC_DAT3, - - /* OMAP-1710 MMC CMDDIR and DATDIR0 */ - M15_1710_MMC_CLKI, - P19_1710_MMC_CMDDIR, - P20_1710_MMC_DATDIR0, - - /* OMAP-1610 USB0 alternate pin configuration */ - W9_USB0_TXEN, - AA9_USB0_VP, - Y5_USB0_RCV, - R9_USB0_VM, - V6_USB0_TXD, - W5_USB0_SE0, - V9_USB0_SPEED, - V9_USB0_SUSP, - - /* USB2 */ - W9_USB2_TXEN, - AA9_USB2_VP, - Y5_USB2_RCV, - R9_USB2_VM, - V6_USB2_TXD, - W5_USB2_SE0, - - /* 16XX UART */ - R13_1610_UART1_TX, - V14_16XX_UART1_RX, - R14_1610_UART1_CTS, - AA15_1610_UART1_RTS, - R9_16XX_UART2_RX, - L14_16XX_UART3_RX, - - /* I2C OMAP-1610 */ - I2C_SCL, - I2C_SDA, - - /* Keypad */ - F18_1610_KBC0, - D20_1610_KBC1, - D19_1610_KBC2, - E18_1610_KBC3, - C21_1610_KBC4, - G18_1610_KBR0, - F19_1610_KBR1, - H14_1610_KBR2, - E20_1610_KBR3, - E19_1610_KBR4, - N19_1610_KBR5, - - /* Power management */ - T20_1610_LOW_PWR, - - /* MCLK Settings */ - V5_1710_MCLK_ON, - V5_1710_MCLK_OFF, - R10_1610_MCLK_ON, - R10_1610_MCLK_OFF, - - /* CompactFlash controller */ - P11_1610_CF_CD2, - R11_1610_CF_IOIS16, - V10_1610_CF_IREQ, - W10_1610_CF_RESET, - W11_1610_CF_CD1, - - /* parallel camera */ - J15_1610_CAM_LCLK, - J18_1610_CAM_D7, - J19_1610_CAM_D6, - J14_1610_CAM_D5, - K18_1610_CAM_D4, - K19_1610_CAM_D3, - K15_1610_CAM_D2, - K14_1610_CAM_D1, - L19_1610_CAM_D0, - L18_1610_CAM_VS, - L15_1610_CAM_HS, - M19_1610_CAM_RSTZ, - Y15_1610_CAM_OUTCLK, - - /* serial camera */ - H19_1610_CAM_EXCLK, - Y12_1610_CCP_CLKP, - W13_1610_CCP_CLKM, - W14_1610_CCP_DATAP, - Y14_1610_CCP_DATAM, - -}; - -struct omap_mux_cfg { - struct pin_config *pins; - unsigned long size; - int (*cfg_reg)(const struct pin_config *cfg); -}; - -#ifdef CONFIG_OMAP_MUX -/* setup pin muxing in Linux */ -extern int omap1_mux_init(void); -extern int omap_mux_register(struct omap_mux_cfg *); -extern int omap_cfg_reg(unsigned long reg_cfg); -#else -/* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */ -static inline int omap1_mux_init(void) { return 0; } -static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; } -#endif - -extern int omap2_mux_init(void); - -#endif diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/arch/arm/mach-omap1/include/mach/soc.h deleted file mode 100644 index 1897cbabfc93..000000000000 --- a/arch/arm/mach-omap1/include/mach/soc.h +++ /dev/null @@ -1,220 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * OMAP cpu type detection - * - * Copyright (C) 2004, 2008 Nokia Corporation - * - * Copyright (C) 2009-11 Texas Instruments. - * - * Written by Tony Lindgren <tony.lindgren@nokia.com> - * - * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com> - */ - -#ifndef __ASM_ARCH_OMAP_CPU_H -#define __ASM_ARCH_OMAP_CPU_H - -#include <asm/irq.h> -#include <mach/hardware.h> -#include <mach/irqs.h> - -#ifndef __ASSEMBLY__ - -#include <linux/bitops.h> - -/* - * Test if multicore OMAP support is needed - */ -#undef MULTI_OMAP1 -#undef OMAP_NAME - -#ifdef CONFIG_ARCH_OMAP730 -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap730 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP850 -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap850 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP15XX -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap1510 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP16XX -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap16xx -# endif -#endif - -/* - * omap_rev bits: - * CPU id bits (0730, 1510, 1710, 2422...) [31:16] - * CPU revision (See _REV_ defined in cpu.h) [15:08] - * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00] - */ -unsigned int omap_rev(void); - -/* - * Get the CPU revision for OMAP devices - */ -#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff) - -/* - * Macros to group OMAP into cpu classes. - * These can be used in most places. - * cpu_is_omap7xx(): True for OMAP730, OMAP850 - * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310 - * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710 - */ -#define GET_OMAP_CLASS (omap_rev() & 0xff) - -#define IS_OMAP_CLASS(class, id) \ -static inline int is_omap ##class (void) \ -{ \ - return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ -} - -#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff) - -#define IS_OMAP_SUBCLASS(subclass, id) \ -static inline int is_omap ##subclass (void) \ -{ \ - return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ -} - -IS_OMAP_CLASS(7xx, 0x07) -IS_OMAP_CLASS(15xx, 0x15) -IS_OMAP_CLASS(16xx, 0x16) - -#define cpu_is_omap7xx() 0 -#define cpu_is_omap15xx() 0 -#define cpu_is_omap16xx() 0 - -#if defined(MULTI_OMAP1) -# if defined(CONFIG_ARCH_OMAP730) -# undef cpu_is_omap7xx -# define cpu_is_omap7xx() is_omap7xx() -# endif -# if defined(CONFIG_ARCH_OMAP850) -# undef cpu_is_omap7xx -# define cpu_is_omap7xx() is_omap7xx() -# endif -# if defined(CONFIG_ARCH_OMAP15XX) -# undef cpu_is_omap15xx -# define cpu_is_omap15xx() is_omap15xx() -# endif -# if defined(CONFIG_ARCH_OMAP16XX) -# undef cpu_is_omap16xx -# define cpu_is_omap16xx() is_omap16xx() -# endif -#else -# if defined(CONFIG_ARCH_OMAP730) -# undef cpu_is_omap7xx -# define cpu_is_omap7xx() 1 -# endif -# if defined(CONFIG_ARCH_OMAP850) -# undef cpu_is_omap7xx -# define cpu_is_omap7xx() 1 -# endif -# if defined(CONFIG_ARCH_OMAP15XX) -# undef cpu_is_omap15xx -# define cpu_is_omap15xx() 1 -# endif -# if defined(CONFIG_ARCH_OMAP16XX) -# undef cpu_is_omap16xx -# define cpu_is_omap16xx() 1 -# endif -#endif - -/* - * Macros to detect individual cpu types. - * These are only rarely needed. - * cpu_is_omap310(): True for OMAP310 - * cpu_is_omap1510(): True for OMAP1510 - * cpu_is_omap1610(): True for OMAP1610 - * cpu_is_omap1611(): True for OMAP1611 - * cpu_is_omap5912(): True for OMAP5912 - * cpu_is_omap1621(): True for OMAP1621 - * cpu_is_omap1710(): True for OMAP1710 - */ -#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff) - -#define IS_OMAP_TYPE(type, id) \ -static inline int is_omap ##type (void) \ -{ \ - return (GET_OMAP_TYPE == (id)) ? 1 : 0; \ -} - -IS_OMAP_TYPE(310, 0x0310) -IS_OMAP_TYPE(1510, 0x1510) -IS_OMAP_TYPE(1610, 0x1610) -IS_OMAP_TYPE(1611, 0x1611) -IS_OMAP_TYPE(5912, 0x1611) -IS_OMAP_TYPE(1621, 0x1621) -IS_OMAP_TYPE(1710, 0x1710) - -#define cpu_is_omap310() 0 -#define cpu_is_omap1510() 0 -#define cpu_is_omap1610() 0 -#define cpu_is_omap5912() 0 -#define cpu_is_omap1611() 0 -#define cpu_is_omap1621() 0 -#define cpu_is_omap1710() 0 - -/* These are needed to compile common code */ -#ifdef CONFIG_ARCH_OMAP1 -#define cpu_is_omap242x() 0 -#define cpu_is_omap2430() 0 -#define cpu_is_omap243x() 0 -#define cpu_is_omap24xx() 0 -#define cpu_is_omap34xx() 0 -#define cpu_is_omap44xx() 0 -#define soc_is_omap54xx() 0 -#define soc_is_dra7xx() 0 -#define soc_is_am33xx() 0 -#define cpu_class_is_omap1() 1 -#define cpu_class_is_omap2() 0 -#endif - -/* - * Whether we have MULTI_OMAP1 or not, we still need to distinguish - * between 310 vs. 1510 and 1611B/5912 vs. 1710. - */ - -#if defined(CONFIG_ARCH_OMAP15XX) -# undef cpu_is_omap310 -# undef cpu_is_omap1510 -# define cpu_is_omap310() is_omap310() -# define cpu_is_omap1510() is_omap1510() -#endif - -#if defined(CONFIG_ARCH_OMAP16XX) -# undef cpu_is_omap1610 -# undef cpu_is_omap1611 -# undef cpu_is_omap5912 -# undef cpu_is_omap1621 -# undef cpu_is_omap1710 -# define cpu_is_omap1610() is_omap1610() -# define cpu_is_omap1611() is_omap1611() -# define cpu_is_omap5912() is_omap5912() -# define cpu_is_omap1621() is_omap1621() -# define cpu_is_omap1710() is_omap1710() -#endif - -#endif /* __ASSEMBLY__ */ -#endif diff --git a/arch/arm/mach-omap1/include/mach/usb.h b/arch/arm/mach-omap1/include/mach/usb.h deleted file mode 100644 index 5429d86c7190..000000000000 --- a/arch/arm/mach-omap1/include/mach/usb.h +++ /dev/null @@ -1,128 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * FIXME correct answer depends on hmc_mode, - * as does (on omap1) any nonzero value for config->otg port number - */ -#if IS_ENABLED(CONFIG_USB_OMAP) -#define is_usb0_device(config) 1 -#else -#define is_usb0_device(config) 0 -#endif - -#include <linux/platform_data/usb-omap1.h> - -#if IS_ENABLED(CONFIG_USB_SUPPORT) -void omap1_usb_init(struct omap_usb_config *pdata); -#else -static inline void omap1_usb_init(struct omap_usb_config *pdata) -{ -} -#endif - -#define OMAP1_OTG_BASE 0xfffb0400 -#define OMAP1_UDC_BASE 0xfffb4000 -#define OMAP1_OHCI_BASE 0xfffba000 - -#define OMAP2_OHCI_BASE 0x4805e000 -#define OMAP2_UDC_BASE 0x4805e200 -#define OMAP2_OTG_BASE 0x4805e300 -#define OTG_BASE OMAP1_OTG_BASE -#define UDC_BASE OMAP1_UDC_BASE -#define OMAP_OHCI_BASE OMAP1_OHCI_BASE - -/* - * OTG and transceiver registers, for OMAPs starting with ARM926 - */ -#define OTG_REV (OTG_BASE + 0x00) -#define OTG_SYSCON_1 (OTG_BASE + 0x04) -# define USB2_TRX_MODE(w) (((w)>>24)&0x07) -# define USB1_TRX_MODE(w) (((w)>>20)&0x07) -# define USB0_TRX_MODE(w) (((w)>>16)&0x07) -# define OTG_IDLE_EN (1 << 15) -# define HST_IDLE_EN (1 << 14) -# define DEV_IDLE_EN (1 << 13) -# define OTG_RESET_DONE (1 << 2) -# define OTG_SOFT_RESET (1 << 1) -#define OTG_SYSCON_2 (OTG_BASE + 0x08) -# define OTG_EN (1 << 31) -# define USBX_SYNCHRO (1 << 30) -# define OTG_MST16 (1 << 29) -# define SRP_GPDATA (1 << 28) -# define SRP_GPDVBUS (1 << 27) -# define SRP_GPUVBUS(w) (((w)>>24)&0x07) -# define A_WAIT_VRISE(w) (((w)>>20)&0x07) -# define B_ASE_BRST(w) (((w)>>16)&0x07) -# define SRP_DPW (1 << 14) -# define SRP_DATA (1 << 13) -# define SRP_VBUS (1 << 12) -# define OTG_PADEN (1 << 10) -# define HMC_PADEN (1 << 9) -# define UHOST_EN (1 << 8) -# define HMC_TLLSPEED (1 << 7) -# define HMC_TLLATTACH (1 << 6) -# define OTG_HMC(w) (((w)>>0)&0x3f) -#define OTG_CTRL (OTG_BASE + 0x0c) -# define OTG_USB2_EN (1 << 29) -# define OTG_USB2_DP (1 << 28) -# define OTG_USB2_DM (1 << 27) -# define OTG_USB1_EN (1 << 26) -# define OTG_USB1_DP (1 << 25) -# define OTG_USB1_DM (1 << 24) -# define OTG_USB0_EN (1 << 23) -# define OTG_USB0_DP (1 << 22) -# define OTG_USB0_DM (1 << 21) -# define OTG_ASESSVLD (1 << 20) -# define OTG_BSESSEND (1 << 19) -# define OTG_BSESSVLD (1 << 18) -# define OTG_VBUSVLD (1 << 17) -# define OTG_ID (1 << 16) -# define OTG_DRIVER_SEL (1 << 15) -# define OTG_A_SETB_HNPEN (1 << 12) -# define OTG_A_BUSREQ (1 << 11) -# define OTG_B_HNPEN (1 << 9) -# define OTG_B_BUSREQ (1 << 8) -# define OTG_BUSDROP (1 << 7) -# define OTG_PULLDOWN (1 << 5) -# define OTG_PULLUP (1 << 4) -# define OTG_DRV_VBUS (1 << 3) -# define OTG_PD_VBUS (1 << 2) -# define OTG_PU_VBUS (1 << 1) -# define OTG_PU_ID (1 << 0) -#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */ -# define DRIVER_SWITCH (1 << 15) -# define A_VBUS_ERR (1 << 13) -# define A_REQ_TMROUT (1 << 12) -# define A_SRP_DETECT (1 << 11) -# define B_HNP_FAIL (1 << 10) -# define B_SRP_TMROUT (1 << 9) -# define B_SRP_DONE (1 << 8) -# define B_SRP_STARTED (1 << 7) -# define OPRT_CHG (1 << 0) -#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */ - // same bits as in IRQ_EN -#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */ -# define OTGVPD (1 << 14) -# define OTGVPU (1 << 13) -# define OTGPUID (1 << 12) -# define USB2VDR (1 << 10) -# define USB2PDEN (1 << 9) -# define USB2PUEN (1 << 8) -# define USB1VDR (1 << 6) -# define USB1PDEN (1 << 5) -# define USB1PUEN (1 << 4) -# define USB0VDR (1 << 2) -# define USB0PDEN (1 << 1) -# define USB0PUEN (1 << 0) -#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */ -#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */ - -/*-------------------------------------------------------------------------*/ - -/* OMAP1 */ -#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064) -# define CONF_USB2_UNI_R (1 << 8) -# define CONF_USB1_UNI_R (1 << 7) -# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7) -# define CONF_USB0_ISOLATE_R (1 << 3) -# define CONF_USB_PWRDN_DM_R (1 << 2) -# define CONF_USB_PWRDN_DP_R (1 << 1) diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 5a173fc2a1ca..05ee260918fa 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -9,14 +9,13 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/io.h> +#include <linux/omap-dma.h> #include <asm/tlb.h> #include <asm/mach/map.h> -#include <mach/mux.h> -#include <mach/tc.h> -#include <linux/omap-dma.h> - +#include "tc.h" +#include "mux.h" #include "iomap.h" #include "common.h" #include "clock.h" diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index ee6a93083154..70868e9f19ac 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -47,9 +47,7 @@ #include <asm/mach/irq.h> #include "soc.h" - -#include <mach/hardware.h> - +#include "hardware.h" #include "common.h" #define IRQ_BANK(irq) ((irq) >> 5) diff --git a/arch/arm/mach-omap1/include/mach/irqs.h b/arch/arm/mach-omap1/irqs.h index 30bf007700cf..2851acfe5ff3 100644 --- a/arch/arm/mach-omap1/include/mach/irqs.h +++ b/arch/arm/mach-omap1/irqs.h @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ /* - * arch/arm/plat-omap/include/mach/irqs.h - * * Copyright (C) Greg Lonnon 2001 * Updated for OMAP-1610 by Tony Lindgren <tony@atomide.com> * diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c deleted file mode 100644 index a72ac0c02b4f..000000000000 --- a/arch/arm/mach-omap1/lcd_dma.c +++ /dev/null @@ -1,441 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/lcd_dma.c - * - * Extracted from arch/arm/plat-omap/dma.c - * Copyright (C) 2003 - 2008 Nokia Corporation - * Author: Juha Yrjölä <juha.yrjola@nokia.com> - * DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com> - * Graphics DMA and LCD DMA graphics tranformations - * by Imre Deak <imre.deak@nokia.com> - * OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc. - * Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com> - * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc. - * - * Copyright (C) 2009 Texas Instruments - * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> - * - * Support functions for the OMAP internal DMA channels. - */ - -#include <linux/module.h> -#include <linux/spinlock.h> -#include <linux/interrupt.h> -#include <linux/io.h> - -#include <linux/omap-dma.h> - -#include <mach/hardware.h> -#include <mach/lcdc.h> - -int omap_lcd_dma_running(void) -{ - /* - * On OMAP1510, internal LCD controller will start the transfer - * when it gets enabled, so assume DMA running if LCD enabled. - */ - if (cpu_is_omap15xx()) - if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN) - return 1; - - /* Check if LCD DMA is running */ - if (cpu_is_omap16xx()) - if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN) - return 1; - - return 0; -} - -static struct lcd_dma_info { - spinlock_t lock; - int reserved; - void (*callback)(u16 status, void *data); - void *cb_data; - - int active; - unsigned long addr; - int rotate, data_type, xres, yres; - int vxres; - int mirror; - int xscale, yscale; - int ext_ctrl; - int src_port; - int single_transfer; -} lcd_dma; - -void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres, - int data_type) -{ - lcd_dma.addr = addr; - lcd_dma.data_type = data_type; - lcd_dma.xres = fb_xres; - lcd_dma.yres = fb_yres; -} -EXPORT_SYMBOL(omap_set_lcd_dma_b1); - -void omap_set_lcd_dma_ext_controller(int external) -{ - lcd_dma.ext_ctrl = external; -} -EXPORT_SYMBOL(omap_set_lcd_dma_ext_controller); - -void omap_set_lcd_dma_single_transfer(int single) -{ - lcd_dma.single_transfer = single; -} -EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer); - -void omap_set_lcd_dma_b1_rotation(int rotate) -{ - if (cpu_is_omap15xx()) { - printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n"); - BUG(); - return; - } - lcd_dma.rotate = rotate; -} -EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation); - -void omap_set_lcd_dma_b1_mirror(int mirror) -{ - if (cpu_is_omap15xx()) { - printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n"); - BUG(); - } - lcd_dma.mirror = mirror; -} -EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror); - -void omap_set_lcd_dma_b1_vxres(unsigned long vxres) -{ - if (cpu_is_omap15xx()) { - pr_err("DMA virtual resolution is not supported in 1510 mode\n"); - BUG(); - } - lcd_dma.vxres = vxres; -} -EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres); - -void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale) -{ - if (cpu_is_omap15xx()) { - printk(KERN_ERR "DMA scale is not supported in 1510 mode\n"); - BUG(); - } - lcd_dma.xscale = xscale; - lcd_dma.yscale = yscale; -} -EXPORT_SYMBOL(omap_set_lcd_dma_b1_scale); - -static void set_b1_regs(void) -{ - unsigned long top, bottom; - int es; - u16 w; - unsigned long en, fn; - long ei, fi; - unsigned long vxres; - unsigned int xscale, yscale; - - switch (lcd_dma.data_type) { - case OMAP_DMA_DATA_TYPE_S8: - es = 1; - break; - case OMAP_DMA_DATA_TYPE_S16: - es = 2; - break; - case OMAP_DMA_DATA_TYPE_S32: - es = 4; - break; - default: - BUG(); - return; - } - - vxres = lcd_dma.vxres ? lcd_dma.vxres : lcd_dma.xres; - xscale = lcd_dma.xscale ? lcd_dma.xscale : 1; - yscale = lcd_dma.yscale ? lcd_dma.yscale : 1; - BUG_ON(vxres < lcd_dma.xres); - -#define PIXADDR(x, y) (lcd_dma.addr + \ - ((y) * vxres * yscale + (x) * xscale) * es) -#define PIXSTEP(sx, sy, dx, dy) (PIXADDR(dx, dy) - PIXADDR(sx, sy) - es + 1) - - switch (lcd_dma.rotate) { - case 0: - if (!lcd_dma.mirror) { - top = PIXADDR(0, 0); - bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1); - /* 1510 DMA requires the bottom address to be 2 more - * than the actual last memory access location. */ - if (cpu_is_omap15xx() && - lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32) - bottom += 2; - ei = PIXSTEP(0, 0, 1, 0); - fi = PIXSTEP(lcd_dma.xres - 1, 0, 0, 1); - } else { - top = PIXADDR(lcd_dma.xres - 1, 0); - bottom = PIXADDR(0, lcd_dma.yres - 1); - ei = PIXSTEP(1, 0, 0, 0); - fi = PIXSTEP(0, 0, lcd_dma.xres - 1, 1); - } - en = lcd_dma.xres; - fn = lcd_dma.yres; - break; - case 90: - if (!lcd_dma.mirror) { - top = PIXADDR(0, lcd_dma.yres - 1); - bottom = PIXADDR(lcd_dma.xres - 1, 0); - ei = PIXSTEP(0, 1, 0, 0); - fi = PIXSTEP(0, 0, 1, lcd_dma.yres - 1); - } else { - top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1); - bottom = PIXADDR(0, 0); - ei = PIXSTEP(0, 1, 0, 0); - fi = PIXSTEP(1, 0, 0, lcd_dma.yres - 1); - } - en = lcd_dma.yres; - fn = lcd_dma.xres; - break; - case 180: - if (!lcd_dma.mirror) { - top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1); - bottom = PIXADDR(0, 0); - ei = PIXSTEP(1, 0, 0, 0); - fi = PIXSTEP(0, 1, lcd_dma.xres - 1, 0); - } else { - top = PIXADDR(0, lcd_dma.yres - 1); - bottom = PIXADDR(lcd_dma.xres - 1, 0); - ei = PIXSTEP(0, 0, 1, 0); - fi = PIXSTEP(lcd_dma.xres - 1, 1, 0, 0); - } - en = lcd_dma.xres; - fn = lcd_dma.yres; - break; - case 270: - if (!lcd_dma.mirror) { - top = PIXADDR(lcd_dma.xres - 1, 0); - bottom = PIXADDR(0, lcd_dma.yres - 1); - ei = PIXSTEP(0, 0, 0, 1); - fi = PIXSTEP(1, lcd_dma.yres - 1, 0, 0); - } else { - top = PIXADDR(0, 0); - bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1); - ei = PIXSTEP(0, 0, 0, 1); - fi = PIXSTEP(0, lcd_dma.yres - 1, 1, 0); - } - en = lcd_dma.yres; - fn = lcd_dma.xres; - break; - default: - BUG(); - return; /* Suppress warning about uninitialized vars */ - } - - if (cpu_is_omap15xx()) { - omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U); - omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L); - omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U); - omap_writew(bottom, OMAP1510_DMA_LCD_BOT_F1_L); - - return; - } - - /* 1610 regs */ - omap_writew(top >> 16, OMAP1610_DMA_LCD_TOP_B1_U); - omap_writew(top, OMAP1610_DMA_LCD_TOP_B1_L); - omap_writew(bottom >> 16, OMAP1610_DMA_LCD_BOT_B1_U); - omap_writew(bottom, OMAP1610_DMA_LCD_BOT_B1_L); - - omap_writew(en, OMAP1610_DMA_LCD_SRC_EN_B1); - omap_writew(fn, OMAP1610_DMA_LCD_SRC_FN_B1); - - w = omap_readw(OMAP1610_DMA_LCD_CSDP); - w &= ~0x03; - w |= lcd_dma.data_type; - omap_writew(w, OMAP1610_DMA_LCD_CSDP); - - w = omap_readw(OMAP1610_DMA_LCD_CTRL); - /* Always set the source port as SDRAM for now*/ - w &= ~(0x03 << 6); - if (lcd_dma.callback != NULL) - w |= 1 << 1; /* Block interrupt enable */ - else - w &= ~(1 << 1); - omap_writew(w, OMAP1610_DMA_LCD_CTRL); - - if (!(lcd_dma.rotate || lcd_dma.mirror || - lcd_dma.vxres || lcd_dma.xscale || lcd_dma.yscale)) - return; - - w = omap_readw(OMAP1610_DMA_LCD_CCR); - /* Set the double-indexed addressing mode */ - w |= (0x03 << 12); - omap_writew(w, OMAP1610_DMA_LCD_CCR); - - omap_writew(ei, OMAP1610_DMA_LCD_SRC_EI_B1); - omap_writew(fi >> 16, OMAP1610_DMA_LCD_SRC_FI_B1_U); - omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L); -} - -static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id) -{ - u16 w; - - w = omap_readw(OMAP1610_DMA_LCD_CTRL); - if (unlikely(!(w & (1 << 3)))) { - printk(KERN_WARNING "Spurious LCD DMA IRQ\n"); - return IRQ_NONE; - } - /* Ack the IRQ */ - w |= (1 << 3); - omap_writew(w, OMAP1610_DMA_LCD_CTRL); - lcd_dma.active = 0; - if (lcd_dma.callback != NULL) - lcd_dma.callback(w, lcd_dma.cb_data); - - return IRQ_HANDLED; -} - -int omap_request_lcd_dma(void (*callback)(u16 status, void *data), - void *data) -{ - spin_lock_irq(&lcd_dma.lock); - if (lcd_dma.reserved) { - spin_unlock_irq(&lcd_dma.lock); - printk(KERN_ERR "LCD DMA channel already reserved\n"); - BUG(); - return -EBUSY; - } - lcd_dma.reserved = 1; - spin_unlock_irq(&lcd_dma.lock); - lcd_dma.callback = callback; - lcd_dma.cb_data = data; - lcd_dma.active = 0; - lcd_dma.single_transfer = 0; - lcd_dma.rotate = 0; - lcd_dma.vxres = 0; - lcd_dma.mirror = 0; - lcd_dma.xscale = 0; - lcd_dma.yscale = 0; - lcd_dma.ext_ctrl = 0; - lcd_dma.src_port = 0; - - return 0; -} -EXPORT_SYMBOL(omap_request_lcd_dma); - -void omap_free_lcd_dma(void) -{ - spin_lock(&lcd_dma.lock); - if (!lcd_dma.reserved) { - spin_unlock(&lcd_dma.lock); - printk(KERN_ERR "LCD DMA is not reserved\n"); - BUG(); - return; - } - if (!cpu_is_omap15xx()) - omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1, - OMAP1610_DMA_LCD_CCR); - lcd_dma.reserved = 0; - spin_unlock(&lcd_dma.lock); -} -EXPORT_SYMBOL(omap_free_lcd_dma); - -void omap_enable_lcd_dma(void) -{ - u16 w; - - /* - * Set the Enable bit only if an external controller is - * connected. Otherwise the OMAP internal controller will - * start the transfer when it gets enabled. - */ - if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl) - return; - - w = omap_readw(OMAP1610_DMA_LCD_CTRL); - w |= 1 << 8; - omap_writew(w, OMAP1610_DMA_LCD_CTRL); - - lcd_dma.active = 1; - - w = omap_readw(OMAP1610_DMA_LCD_CCR); - w |= 1 << 7; - omap_writew(w, OMAP1610_DMA_LCD_CCR); -} -EXPORT_SYMBOL(omap_enable_lcd_dma); - -void omap_setup_lcd_dma(void) -{ - BUG_ON(lcd_dma.active); - if (!cpu_is_omap15xx()) { - /* Set some reasonable defaults */ - omap_writew(0x5440, OMAP1610_DMA_LCD_CCR); - omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP); - omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL); - } - set_b1_regs(); - if (!cpu_is_omap15xx()) { - u16 w; - - w = omap_readw(OMAP1610_DMA_LCD_CCR); - /* - * If DMA was already active set the end_prog bit to have - * the programmed register set loaded into the active - * register set. - */ - w |= 1 << 11; /* End_prog */ - if (!lcd_dma.single_transfer) - w |= (3 << 8); /* Auto_init, repeat */ - omap_writew(w, OMAP1610_DMA_LCD_CCR); - } -} -EXPORT_SYMBOL(omap_setup_lcd_dma); - -void omap_stop_lcd_dma(void) -{ - u16 w; - - lcd_dma.active = 0; - if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl) - return; - - w = omap_readw(OMAP1610_DMA_LCD_CCR); - w &= ~(1 << 7); - omap_writew(w, OMAP1610_DMA_LCD_CCR); - - w = omap_readw(OMAP1610_DMA_LCD_CTRL); - w &= ~(1 << 8); - omap_writew(w, OMAP1610_DMA_LCD_CTRL); -} -EXPORT_SYMBOL(omap_stop_lcd_dma); - -static int __init omap_init_lcd_dma(void) -{ - int r; - - if (!cpu_class_is_omap1()) - return -ENODEV; - - if (cpu_is_omap16xx()) { - u16 w; - - /* this would prevent OMAP sleep */ - w = omap_readw(OMAP1610_DMA_LCD_CTRL); - w &= ~(1 << 8); - omap_writew(w, OMAP1610_DMA_LCD_CTRL); - } - - spin_lock_init(&lcd_dma.lock); - - r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0, - "LCD DMA", NULL); - if (r != 0) - pr_err("unable to request IRQ for LCD DMA (error %d)\n", r); - - return r; -} - -arch_initcall(omap_init_lcd_dma); - diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index f36c34f47f11..05c25c432449 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -15,14 +15,13 @@ #include <linux/io.h> #include <linux/platform_device.h> #include <linux/slab.h> - #include <linux/omap-dma.h> -#include <mach/mux.h> -#include "soc.h" +#include <linux/soc/ti/omap1-io.h> #include <linux/platform_data/asoc-ti-mcbsp.h> -#include <mach/irqs.h> - +#include "mux.h" +#include "soc.h" +#include "irqs.h" #include "iomap.h" #define DPS_RSTCT2_PER_EN (1 << 0) @@ -44,8 +43,8 @@ static void omap1_mcbsp_request(unsigned int id) api_clk = clk_get(NULL, "api_ck"); dsp_clk = clk_get(NULL, "dsp_ck"); if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) { - clk_enable(api_clk); - clk_enable(dsp_clk); + clk_prepare_enable(api_clk); + clk_prepare_enable(dsp_clk); /* * DSP external peripheral reset @@ -63,11 +62,11 @@ static void omap1_mcbsp_free(unsigned int id) if (id == 0 || id == 2) { if (--dsp_use == 0) { if (!IS_ERR(api_clk)) { - clk_disable(api_clk); + clk_disable_unprepare(api_clk); clk_put(api_clk); } if (!IS_ERR(dsp_clk)) { - clk_disable(dsp_clk); + clk_disable_unprepare(dsp_clk); clk_put(dsp_clk); } } diff --git a/arch/arm/mach-omap1/include/mach/mtd-xip.h b/arch/arm/mach-omap1/mtd-xip.h index d09b2bc4920f..b675d501b13d 100644 --- a/arch/arm/mach-omap1/include/mach/mtd-xip.h +++ b/arch/arm/mach-omap1/mtd-xip.h @@ -14,7 +14,8 @@ #ifndef __ARCH_OMAP_MTD_XIP_H__ #define __ARCH_OMAP_MTD_XIP_H__ -#include <mach/hardware.h> +#include "hardware.h" +#include <linux/soc/ti/omap1-io.h> #define OMAP_MPU_TIMER_BASE (0xfffec500) #define OMAP_MPU_TIMER_OFFSET 0x100 diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 972665bf52d6..2d9458ff1d29 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c @@ -12,10 +12,10 @@ #include <linux/init.h> #include <linux/io.h> #include <linux/spinlock.h> +#include <linux/soc/ti/omap1-io.h> -#include <mach/hardware.h> - -#include <mach/mux.h> +#include "hardware.h" +#include "mux.h" #ifdef CONFIG_OMAP_MUX diff --git a/arch/arm/mach-omap1/mux.h b/arch/arm/mach-omap1/mux.h new file mode 100644 index 000000000000..3e7ed3348a55 --- /dev/null +++ b/arch/arm/mach-omap1/mux.h @@ -0,0 +1,144 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Table of the Omap register configurations for the FUNC_MUX and + * PULL_DWN combinations. + * + * Copyright (C) 2004 - 2008 Texas Instruments Inc. + * Copyright (C) 2003 - 2008 Nokia Corporation + * + * Written by Tony Lindgren + * + * NOTE: Please use the following naming style for new pin entries. + * For example, W8_1610_MMC2_DAT0, where: + * - W8 = ball + * - 1610 = 1510 or 1610, none if common for both 1510 and 1610 + * - MMC2_DAT0 = function + */ + +#ifndef __ASM_ARCH_MUX_H +#define __ASM_ARCH_MUX_H + +#include <linux/soc/ti/omap1-mux.h> + +#define PU_PD_SEL_NA 0 /* No pu_pd reg available */ +#define PULL_DWN_CTRL_NA 0 /* No pull-down control needed */ + +#ifdef CONFIG_OMAP_MUX_DEBUG +#define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \ + .mux_reg = FUNC_MUX_CTRL_##reg, \ + .mask_offset = mode_offset, \ + .mask = mode, + +#define PULL_REG(reg, bit, status) .pull_name = "PULL_DWN_CTRL_"#reg, \ + .pull_reg = PULL_DWN_CTRL_##reg, \ + .pull_bit = bit, \ + .pull_val = status, + +#define PU_PD_REG(reg, status) .pu_pd_name = "PU_PD_SEL_"#reg, \ + .pu_pd_reg = PU_PD_SEL_##reg, \ + .pu_pd_val = status, + +#define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \ + .mux_reg = OMAP7XX_IO_CONF_##reg, \ + .mask_offset = mode_offset, \ + .mask = mode, + +#define PULL_REG_7XX(reg, bit, status) .pull_name = "OMAP7XX_IO_CONF_"#reg, \ + .pull_reg = OMAP7XX_IO_CONF_##reg, \ + .pull_bit = bit, \ + .pull_val = status, + +#else + +#define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \ + .mask_offset = mode_offset, \ + .mask = mode, + +#define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, \ + .pull_bit = bit, \ + .pull_val = status, + +#define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \ + .pu_pd_val = status, + +#define MUX_REG_7XX(reg, mode_offset, mode) \ + .mux_reg = OMAP7XX_IO_CONF_##reg, \ + .mask_offset = mode_offset, \ + .mask = mode, + +#define PULL_REG_7XX(reg, bit, status) .pull_reg = OMAP7XX_IO_CONF_##reg, \ + .pull_bit = bit, \ + .pull_val = status, + +#endif /* CONFIG_OMAP_MUX_DEBUG */ + +#define MUX_CFG(desc, mux_reg, mode_offset, mode, \ + pull_reg, pull_bit, pull_status, \ + pu_pd_reg, pu_pd_status, debug_status) \ +{ \ + .name = desc, \ + .debug = debug_status, \ + MUX_REG(mux_reg, mode_offset, mode) \ + PULL_REG(pull_reg, pull_bit, pull_status) \ + PU_PD_REG(pu_pd_reg, pu_pd_status) \ +}, + + +/* + * OMAP730/850 has a slightly different config for the pin mux. + * - config regs are the OMAP7XX_IO_CONF_x regs (see omap7xx.h) regs and + * not the FUNC_MUX_CTRL_x regs from hardware.h + * - for pull-up/down, only has one enable bit which is in the same register + * as mux config + */ +#define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \ + pull_bit, pull_status, debug_status)\ +{ \ + .name = desc, \ + .debug = debug_status, \ + MUX_REG_7XX(mux_reg, mode_offset, mode) \ + PULL_REG_7XX(mux_reg, pull_bit, pull_status) \ + PU_PD_REG(NA, 0) \ +}, + +struct pin_config { + char *name; + const unsigned int mux_reg; + unsigned char debug; + + const unsigned char mask_offset; + const unsigned char mask; + + const char *pull_name; + const unsigned int pull_reg; + const unsigned char pull_val; + const unsigned char pull_bit; + + const char *pu_pd_name; + const unsigned int pu_pd_reg; + const unsigned char pu_pd_val; + +#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) + const char *mux_reg_name; +#endif + +}; + +struct omap_mux_cfg { + struct pin_config *pins; + unsigned long size; + int (*cfg_reg)(const struct pin_config *cfg); +}; + +#ifdef CONFIG_OMAP_MUX +/* setup pin muxing in Linux */ +extern int omap1_mux_init(void); +extern int omap_mux_register(struct omap_mux_cfg *); +#else +/* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */ +static inline int omap1_mux_init(void) { return 0; } +#endif + +extern int omap2_mux_init(void); + +#endif diff --git a/arch/arm/mach-omap1/ocpi.c b/arch/arm/mach-omap1/ocpi.c index 380ea2de58c1..d48f726571a4 100644 --- a/arch/arm/mach-omap1/ocpi.c +++ b/arch/arm/mach-omap1/ocpi.c @@ -20,9 +20,9 @@ #include <linux/err.h> #include <linux/clk.h> #include <linux/io.h> +#include <linux/soc/ti/omap1-io.h> -#include <mach/hardware.h> - +#include "hardware.h" #include "common.h" #define OCPI_BASE 0xfffec320 @@ -73,7 +73,7 @@ static int __init omap_ocpi_init(void) if (IS_ERR(ocpi_ck)) return PTR_ERR(ocpi_ck); - clk_enable(ocpi_ck); + clk_prepare_enable(ocpi_ck); ocpi_enable(); pr_info("OMAP OCPI interconnect driver loaded\n"); @@ -87,7 +87,7 @@ static void __exit omap_ocpi_exit(void) if (!cpu_is_omap16xx()) return; - clk_disable(ocpi_ck); + clk_disable_unprepare(ocpi_ck); clk_put(ocpi_ck); } diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/mach-omap1/omap-dma.c index 9f11de46aaa9..e504f65cdc1b 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/mach-omap1/omap-dma.c @@ -34,9 +34,10 @@ #include <linux/omap-dma.h> -#ifdef CONFIG_ARCH_OMAP1 -#include <mach/soc.h> -#endif +#include <linux/soc/ti/omap1-io.h> +#include <linux/soc/ti/omap1-soc.h> + +#include "tc.h" /* * MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA @@ -49,22 +50,12 @@ #undef DEBUG -#ifndef CONFIG_ARCH_OMAP1 -enum { DMA_CH_ALLOC_DONE, DMA_CH_PARAMS_SET_DONE, DMA_CH_STARTED, - DMA_CH_QUEUED, DMA_CH_NOTSTARTED, DMA_CH_PAUSED, DMA_CH_LINK_ENABLED -}; - -enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED }; -#endif - #define OMAP_DMA_ACTIVE 0x01 -#define OMAP2_DMA_CSR_CLEAR_MASK 0xffffffff #define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec) static struct omap_system_dma_plat_info *p; static struct omap_dma_dev_attr *d; -static void omap_clear_dma(int lch); static int enable_1510_mode; static u32 errata; @@ -88,21 +79,14 @@ static int omap_dma_reserve_channels; static DEFINE_SPINLOCK(dma_chan_lock); static struct omap_dma_lch *dma_chan; -static inline void disable_lnk(int lch); -static void omap_disable_channel_irq(int lch); -static inline void omap_enable_channel_irq(int lch); - -#ifdef CONFIG_ARCH_OMAP15XX -/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */ -static int omap_dma_in_1510_mode(void) +static inline void omap_disable_channel_irq(int lch) { - return enable_1510_mode; + /* disable channel interrupts */ + p->dma_write(0, CICR, lch); + /* Clear CSR */ + p->dma_read(CSR, lch); } -#else -#define omap_dma_in_1510_mode() 0 -#endif -#ifdef CONFIG_ARCH_OMAP1 static inline void set_gdma_dev(int req, int dev) { u32 reg = OMAP_FUNC_MUX_ARM_BASE + ((req - 1) / 5) * 4; @@ -114,11 +98,6 @@ static inline void set_gdma_dev(int req, int dev) l |= (dev - 1) << shift; omap_writel(l, reg); } -#else -#define set_gdma_dev(req, dev) do {} while (0) -#define omap_readl(reg) 0 -#define omap_writel(val, reg) do {} while (0) -#endif #ifdef CONFIG_ARCH_OMAP1 void omap_set_dma_priority(int lch, int dst_port, int priority) @@ -167,64 +146,40 @@ void omap_set_dma_priority(int lch, int dst_port, int priority) #endif EXPORT_SYMBOL(omap_set_dma_priority); +#if IS_ENABLED(CONFIG_USB_OMAP) +#ifdef CONFIG_ARCH_OMAP15XX +/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */ +static int omap_dma_in_1510_mode(void) +{ + return enable_1510_mode; +} +#else +#define omap_dma_in_1510_mode() 0 +#endif + void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, int frame_count, int sync_mode, int dma_trigger, int src_or_dst_synch) { u32 l; + u16 ccr; l = p->dma_read(CSDP, lch); l &= ~0x03; l |= data_type; p->dma_write(l, CSDP, lch); - if (dma_omap1()) { - u16 ccr; - - ccr = p->dma_read(CCR, lch); - ccr &= ~(1 << 5); - if (sync_mode == OMAP_DMA_SYNC_FRAME) - ccr |= 1 << 5; - p->dma_write(ccr, CCR, lch); - - ccr = p->dma_read(CCR2, lch); - ccr &= ~(1 << 2); - if (sync_mode == OMAP_DMA_SYNC_BLOCK) - ccr |= 1 << 2; - p->dma_write(ccr, CCR2, lch); - } - - if (dma_omap2plus() && dma_trigger) { - u32 val; - - val = p->dma_read(CCR, lch); - - /* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */ - val &= ~((1 << 23) | (3 << 19) | 0x1f); - val |= (dma_trigger & ~0x1f) << 14; - val |= dma_trigger & 0x1f; - - if (sync_mode & OMAP_DMA_SYNC_FRAME) - val |= 1 << 5; - else - val &= ~(1 << 5); - - if (sync_mode & OMAP_DMA_SYNC_BLOCK) - val |= 1 << 18; - else - val &= ~(1 << 18); - - if (src_or_dst_synch == OMAP_DMA_DST_SYNC_PREFETCH) { - val &= ~(1 << 24); /* dest synch */ - val |= (1 << 23); /* Prefetch */ - } else if (src_or_dst_synch) { - val |= 1 << 24; /* source synch */ - } else { - val &= ~(1 << 24); /* dest synch */ - } - p->dma_write(val, CCR, lch); - } + ccr = p->dma_read(CCR, lch); + ccr &= ~(1 << 5); + if (sync_mode == OMAP_DMA_SYNC_FRAME) + ccr |= 1 << 5; + p->dma_write(ccr, CCR, lch); + ccr = p->dma_read(CCR2, lch); + ccr &= ~(1 << 2); + if (sync_mode == OMAP_DMA_SYNC_BLOCK) + ccr |= 1 << 2; + p->dma_write(ccr, CCR2, lch); p->dma_write(elem_count, CEN, lch); p->dma_write(frame_count, CFN, lch); } @@ -232,7 +187,7 @@ EXPORT_SYMBOL(omap_set_dma_transfer_params); void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode) { - if (dma_omap1() && !dma_omap15xx()) { + if (!dma_omap15xx()) { u32 l; l = p->dma_read(LCH_CTRL, lch); @@ -249,15 +204,12 @@ void omap_set_dma_src_params(int lch, int src_port, int src_amode, int src_ei, int src_fi) { u32 l; + u16 w; - if (dma_omap1()) { - u16 w; - - w = p->dma_read(CSDP, lch); - w &= ~(0x1f << 2); - w |= src_port << 2; - p->dma_write(w, CSDP, lch); - } + w = p->dma_read(CSDP, lch); + w &= ~(0x1f << 2); + w |= src_port << 2; + p->dma_write(w, CSDP, lch); l = p->dma_read(CCR, lch); l &= ~(0x03 << 12); @@ -295,26 +247,15 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) case OMAP_DMA_DATA_BURST_DIS: break; case OMAP_DMA_DATA_BURST_4: - if (dma_omap2plus()) - burst = 0x1; - else - burst = 0x2; + burst = 0x2; break; case OMAP_DMA_DATA_BURST_8: - if (dma_omap2plus()) { - burst = 0x2; - break; - } /* * not supported by current hardware on OMAP1 * w |= (0x03 << 7); */ fallthrough; case OMAP_DMA_DATA_BURST_16: - if (dma_omap2plus()) { - burst = 0x3; - break; - } /* OMAP1 don't support burst 16 */ fallthrough; default: @@ -333,12 +274,10 @@ void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode, { u32 l; - if (dma_omap1()) { - l = p->dma_read(CSDP, lch); - l &= ~(0x1f << 9); - l |= dest_port << 9; - p->dma_write(l, CSDP, lch); - } + l = p->dma_read(CSDP, lch); + l &= ~(0x1f << 9); + l |= dest_port << 9; + p->dma_write(l, CSDP, lch); l = p->dma_read(CCR, lch); l &= ~(0x03 << 14); @@ -376,22 +315,12 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) case OMAP_DMA_DATA_BURST_DIS: break; case OMAP_DMA_DATA_BURST_4: - if (dma_omap2plus()) - burst = 0x1; - else - burst = 0x2; + burst = 0x2; break; case OMAP_DMA_DATA_BURST_8: - if (dma_omap2plus()) - burst = 0x2; - else - burst = 0x3; + burst = 0x3; break; case OMAP_DMA_DATA_BURST_16: - if (dma_omap2plus()) { - burst = 0x3; - break; - } /* OMAP1 don't support burst 16 */ fallthrough; default: @@ -407,26 +336,12 @@ EXPORT_SYMBOL(omap_set_dma_dest_burst_mode); static inline void omap_enable_channel_irq(int lch) { /* Clear CSR */ - if (dma_omap1()) - p->dma_read(CSR, lch); - else - p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); + p->dma_read(CSR, lch); /* Enable some nice interrupts. */ p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch); } -static inline void omap_disable_channel_irq(int lch) -{ - /* disable channel interrupts */ - p->dma_write(0, CICR, lch); - /* Clear CSR */ - if (dma_omap1()) - p->dma_read(CSR, lch); - else - p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); -} - void omap_disable_dma_irq(int lch, u16 bits) { dma_chan[lch].enabled_irqs &= ~bits; @@ -439,8 +354,7 @@ static inline void enable_lnk(int lch) l = p->dma_read(CLNK_CTRL, lch); - if (dma_omap1()) - l &= ~(1 << 14); + l &= ~(1 << 14); /* Set the ENABLE_LNK bits */ if (dma_chan[lch].next_lch != -1) @@ -458,19 +372,13 @@ static inline void disable_lnk(int lch) /* Disable interrupts */ omap_disable_channel_irq(lch); - if (dma_omap1()) { - /* Set the STOP_LNK bit */ - l |= 1 << 14; - } - - if (dma_omap2plus()) { - /* Clear the ENABLE_LNK bit */ - l &= ~(1 << 15); - } + /* Set the STOP_LNK bit */ + l |= 1 << 14; p->dma_write(l, CLNK_CTRL, lch); dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE; } +#endif int omap_request_dma(int dev_id, const char *dev_name, void (*callback)(int lch, u16 ch_status, void *data), @@ -509,8 +417,7 @@ int omap_request_dma(int dev_id, const char *dev_name, chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ; - if (dma_omap1()) - chan->enabled_irqs |= OMAP1_DMA_TOUT_IRQ; + chan->enabled_irqs |= OMAP1_DMA_TOUT_IRQ; if (dma_omap16xx()) { /* If the sync device is set, configure it dynamically. */ @@ -523,7 +430,7 @@ int omap_request_dma(int dev_id, const char *dev_name, * id. */ p->dma_write(dev_id | (1 << 10), CCR, free_ch); - } else if (dma_omap1()) { + } else { p->dma_write(dev_id, CCR, free_ch); } @@ -570,6 +477,7 @@ static void omap_clear_dma(int lch) local_irq_restore(flags); } +#if IS_ENABLED(CONFIG_USB_OMAP) void omap_start_dma(int lch) { u32 l; @@ -739,8 +647,7 @@ dma_addr_t omap_get_dma_src_pos(int lch) offset = p->dma_read(CSSA, lch); } - if (dma_omap1()) - offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000); + offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000); return offset; } @@ -778,8 +685,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch) offset = p->dma_read(CDSA, lch); } - if (dma_omap1()) - offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000); + offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000); return offset; } @@ -790,14 +696,14 @@ int omap_get_dma_active_status(int lch) return (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN) != 0; } EXPORT_SYMBOL(omap_get_dma_active_status); +#endif int omap_dma_running(void) { int lch; - if (dma_omap1()) - if (omap_lcd_dma_running()) - return 1; + if (omap_lcd_dma_running()) + return 1; for (lch = 0; lch < dma_chan_count; lch++) if (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN) @@ -808,8 +714,6 @@ int omap_dma_running(void) /*----------------------------------------------------------------------------*/ -#ifdef CONFIG_ARCH_OMAP1 - static int omap1_dma_handle_ch(int ch) { u32 csr; @@ -862,10 +766,6 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id) return handled ? IRQ_HANDLED : IRQ_NONE; } -#else -#define omap1_dma_irq_handler NULL -#endif - struct omap_system_dma_plat_info *omap_get_plat_info(void) { return p; @@ -911,29 +811,27 @@ static int omap_system_dma_probe(struct platform_device *pdev) if (ch >= 6 && enable_1510_mode) continue; - if (dma_omap1()) { - /* - * request_irq() doesn't like dev_id (ie. ch) being - * zero, so we have to kludge around this. - */ - sprintf(&irq_name[0], "%d", ch); - dma_irq = platform_get_irq_byname(pdev, irq_name); - - if (dma_irq < 0) { - ret = dma_irq; - goto exit_dma_irq_fail; - } - - /* INT_DMA_LCD is handled in lcd_dma.c */ - if (dma_irq == INT_DMA_LCD) - continue; - - ret = request_irq(dma_irq, - omap1_dma_irq_handler, 0, "DMA", - (void *) (ch + 1)); - if (ret != 0) - goto exit_dma_irq_fail; + /* + * request_irq() doesn't like dev_id (ie. ch) being + * zero, so we have to kludge around this. + */ + sprintf(&irq_name[0], "%d", ch); + dma_irq = platform_get_irq_byname(pdev, irq_name); + + if (dma_irq < 0) { + ret = dma_irq; + goto exit_dma_irq_fail; } + + /* INT_DMA_LCD is handled in lcd_dma.c */ + if (dma_irq == INT_DMA_LCD) + continue; + + ret = request_irq(dma_irq, + omap1_dma_irq_handler, 0, "DMA", + (void *) (ch + 1)); + if (ret != 0) + goto exit_dma_irq_fail; } /* reserve dma channels 0 and 1 in high security devices on 34xx */ @@ -953,9 +851,6 @@ static int omap_system_dma_remove(struct platform_device *pdev) { int dma_irq, irq_rel = 0; - if (dma_omap2plus()) - return 0; - for ( ; irq_rel < dma_chan_count; irq_rel++) { dma_irq = platform_get_irq(pdev, irq_rel); free_irq(dma_irq, (void *)(irq_rel + 1)); diff --git a/arch/arm/mach-omap1/include/mach/omap1510.h b/arch/arm/mach-omap1/omap1510.h index 3d235244bf5c..3d235244bf5c 100644 --- a/arch/arm/mach-omap1/include/mach/omap1510.h +++ b/arch/arm/mach-omap1/omap1510.h diff --git a/arch/arm/mach-omap1/include/mach/omap16xx.h b/arch/arm/mach-omap1/omap16xx.h index cd1c724869c7..cd1c724869c7 100644 --- a/arch/arm/mach-omap1/include/mach/omap16xx.h +++ b/arch/arm/mach-omap1/omap16xx.h diff --git a/arch/arm/mach-omap1/include/mach/omap7xx.h b/arch/arm/mach-omap1/omap7xx.h index 63da994bc609..63da994bc609 100644 --- a/arch/arm/mach-omap1/include/mach/omap7xx.h +++ b/arch/arm/mach-omap1/omap7xx.h diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index a745d64d4699..fce7d2b572bf 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -52,13 +52,14 @@ #include <asm/mach/time.h> #include <asm/mach/irq.h> -#include <mach/tc.h> -#include <mach/mux.h> +#include <linux/soc/ti/omap1-io.h> +#include "tc.h" #include <linux/omap-dma.h> #include <clocksource/timer-ti-dm.h> -#include <mach/irqs.h> - +#include "hardware.h" +#include "mux.h" +#include "irqs.h" #include "iomap.h" #include "clock.h" #include "pm.h" diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h index cd926dcb5e7f..d9165709c532 100644 --- a/arch/arm/mach-omap1/pm.h +++ b/arch/arm/mach-omap1/pm.h @@ -34,6 +34,8 @@ #ifndef __ARCH_ARM_MACH_OMAP1_PM_H #define __ARCH_ARM_MACH_OMAP1_PM_H +#include <linux/soc/ti/omap1-io.h> + /* * ---------------------------------------------------------------------------- * Register and offset definitions to be used in PM assembler code diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c index af2c120b0c4e..2eee6a6965ff 100644 --- a/arch/arm/mach-omap1/reset.c +++ b/arch/arm/mach-omap1/reset.c @@ -6,8 +6,7 @@ #include <linux/io.h> #include <linux/reboot.h> -#include <mach/hardware.h> - +#include "hardware.h" #include "iomap.h" #include "common.h" diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 9eb591fbfd89..299ae1106187 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -19,8 +19,9 @@ #include <asm/mach-types.h> -#include <mach/mux.h> +#include <mach/serial.h> +#include "mux.h" #include "pm.h" #include "soc.h" @@ -141,7 +142,7 @@ void __init omap_serial_init(void) if (IS_ERR(uart1_ck)) printk("Could not get uart1_ck\n"); else { - clk_enable(uart1_ck); + clk_prepare_enable(uart1_ck); if (cpu_is_omap15xx()) clk_set_rate(uart1_ck, 12000000); } @@ -151,7 +152,7 @@ void __init omap_serial_init(void) if (IS_ERR(uart2_ck)) printk("Could not get uart2_ck\n"); else { - clk_enable(uart2_ck); + clk_prepare_enable(uart2_ck); if (cpu_is_omap15xx()) clk_set_rate(uart2_ck, 12000000); else @@ -163,7 +164,7 @@ void __init omap_serial_init(void) if (IS_ERR(uart3_ck)) printk("Could not get uart3_ck\n"); else { - clk_enable(uart3_ck); + clk_prepare_enable(uart3_ck); if (cpu_is_omap15xx()) clk_set_rate(uart3_ck, 12000000); } diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S index a908c51839a4..f111b79512ce 100644 --- a/arch/arm/mach-omap1/sleep.S +++ b/arch/arm/mach-omap1/sleep.S @@ -36,7 +36,7 @@ #include <asm/assembler.h> -#include <mach/hardware.h> +#include "hardware.h" #include "iomap.h" #include "pm.h" diff --git a/arch/arm/mach-omap1/soc.h b/arch/arm/mach-omap1/soc.h index 69daf0187b1d..5fb57fdd9c2b 100644 --- a/arch/arm/mach-omap1/soc.h +++ b/arch/arm/mach-omap1/soc.h @@ -1,4 +1,6 @@ /* - * We can move mach/soc.h here once the drivers are fixed + * We can move linux/soc/ti/omap1-soc.h here once the drivers are fixed */ -#include <mach/soc.h> +#include "hardware.h" +#include "irqs.h" +#include <asm/irq.h> diff --git a/arch/arm/mach-omap1/sram-init.c b/arch/arm/mach-omap1/sram-init.c index 3bd60708c345..0e3ec32a008e 100644 --- a/arch/arm/mach-omap1/sram-init.c +++ b/arch/arm/mach-omap1/sram-init.c @@ -14,6 +14,7 @@ #include <asm/fncpy.h> #include <asm/tlb.h> #include <asm/cacheflush.h> +#include <asm/set_memory.h> #include <asm/mach/map.h> @@ -22,18 +23,77 @@ #define OMAP1_SRAM_PA 0x20000000 #define SRAM_BOOTLOADER_SZ 0x80 +#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) + +static void __iomem *omap_sram_base; +static unsigned long omap_sram_start; +static unsigned long omap_sram_skip; +static unsigned long omap_sram_size; +static void __iomem *omap_sram_ceil; + +/* + * Memory allocator for SRAM: calculates the new ceiling address + * for pushing a function using the fncpy API. + * + * Note that fncpy requires the returned address to be aligned + * to an 8-byte boundary. + */ +static void *omap_sram_push_address(unsigned long size) +{ + unsigned long available, new_ceil = (unsigned long)omap_sram_ceil; + + available = omap_sram_ceil - (omap_sram_base + omap_sram_skip); + + if (size > available) { + pr_err("Not enough space in SRAM\n"); + return NULL; + } + + new_ceil -= size; + new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN); + omap_sram_ceil = IOMEM(new_ceil); + + return (void *)omap_sram_ceil; +} + +void *omap_sram_push(void *funcp, unsigned long size) +{ + void *sram; + unsigned long base; + int pages; + void *dst = NULL; + + sram = omap_sram_push_address(size); + if (!sram) + return NULL; + + base = (unsigned long)sram & PAGE_MASK; + pages = PAGE_ALIGN(size) / PAGE_SIZE; + + set_memory_rw(base, pages); + + dst = fncpy(sram, funcp, size); + + set_memory_ro(base, pages); + set_memory_x(base, pages); + + return dst; +} /* * The amount of SRAM depends on the core type. * Note that we cannot try to test for SRAM here because writes * to secure SRAM will hang the system. Also the SRAM is not * yet mapped at this point. + * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early. */ static void __init omap_detect_and_map_sram(void) { - unsigned long omap_sram_skip = SRAM_BOOTLOADER_SZ; - unsigned long omap_sram_start = OMAP1_SRAM_PA; - unsigned long omap_sram_size; + unsigned long base; + int pages; + + omap_sram_skip = SRAM_BOOTLOADER_SZ; + omap_sram_start = OMAP1_SRAM_PA; if (cpu_is_omap7xx()) omap_sram_size = 0x32000; /* 200K */ @@ -47,8 +107,27 @@ static void __init omap_detect_and_map_sram(void) omap_sram_size = 0x4000; } - omap_map_sram(omap_sram_start, omap_sram_size, - omap_sram_skip, 1); + omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE); + omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size, 1); + if (!omap_sram_base) { + pr_err("SRAM: Could not map\n"); + return; + } + + omap_sram_ceil = omap_sram_base + omap_sram_size; + + /* + * Looks like we need to preserve some bootloader code at the + * beginning of SRAM for jumping to flash for reboot to work... + */ + memset_io(omap_sram_base + omap_sram_skip, 0, + omap_sram_size - omap_sram_skip); + + base = (unsigned long)omap_sram_base; + pages = PAGE_ALIGN(omap_sram_size) / PAGE_SIZE; + + set_memory_ro(base, pages); + set_memory_x(base, pages); } static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl); @@ -62,7 +141,7 @@ void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) _omap_sram_reprogram_clock(dpllctl, ckctl); } -int __init omap_sram_init(void) +int __init omap1_sram_init(void) { omap_detect_and_map_sram(); _omap_sram_reprogram_clock = diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S index 37f34fcd65fb..89f4dc1b70f0 100644 --- a/arch/arm/mach-omap1/sram.S +++ b/arch/arm/mach-omap1/sram.S @@ -6,11 +6,11 @@ */ #include <linux/linkage.h> +#include <linux/soc/ti/omap1-io.h> #include <asm/assembler.h> -#include <mach/hardware.h> - +#include "hardware.h" #include "iomap.h" .text diff --git a/arch/arm/mach-omap1/sram.h b/arch/arm/mach-omap1/sram.h index 73efabd119e8..f45e6dd6d7e5 100644 --- a/arch/arm/mach-omap1/sram.h +++ b/arch/arm/mach-omap1/sram.h @@ -1,8 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0 */ -#include <plat/sram.h> extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); +int omap1_sram_init(void); +void *omap_sram_push(void *funcp, unsigned long size); + /* Do not use these */ extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); extern unsigned long omap1_sram_reprogram_clock_sz; diff --git a/arch/arm/mach-omap1/include/mach/tc.h b/arch/arm/mach-omap1/tc.h index adaab6a0bd08..243454bc0684 100644 --- a/arch/arm/mach-omap1/include/mach/tc.h +++ b/arch/arm/mach-omap1/tc.h @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ /* - * arch/arm/plat-omap/include/mach/tc.h - * * OMAP Traffic Controller * * Copyright (C) 2004 Nokia Corporation diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index de590a85a42b..c34b9af00566 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -47,10 +47,10 @@ #include <asm/irq.h> -#include <mach/hardware.h> #include <asm/mach/irq.h> #include <asm/mach/time.h> +#include "hardware.h" #include "iomap.h" #include "common.h" diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c index 0411d5508d63..9ed64345f06e 100644 --- a/arch/arm/mach-omap1/timer.c +++ b/arch/arm/mach-omap1/timer.c @@ -26,6 +26,7 @@ #include <linux/slab.h> #include <linux/platform_device.h> #include <linux/platform_data/dmtimer-omap.h> +#include <linux/soc/ti/omap1-io.h> #include <clocksource/timer-ti-dm.h> diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index 780fdf03c3ce..560cd16568a7 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c @@ -45,15 +45,13 @@ #include <linux/clocksource.h> #include <linux/clockchips.h> #include <linux/io.h> +#include <linux/sched_clock.h> #include <asm/irq.h> #include <asm/mach/irq.h> #include <asm/mach/time.h> -#include <plat/counter-32k.h> - -#include <mach/hardware.h> - +#include "hardware.h" #include "common.h" /* @@ -159,6 +157,98 @@ static __init void omap_init_32k_timer(void) OMAP_32K_TICKS_PER_SEC, 1, 0xfffffffe); } +/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */ +#define OMAP2_32KSYNCNT_REV_OFF 0x0 +#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30) +#define OMAP2_32KSYNCNT_CR_OFF_LOW 0x10 +#define OMAP2_32KSYNCNT_CR_OFF_HIGH 0x30 + +/* + * 32KHz clocksource ... always available, on pretty most chips except + * OMAP 730 and 1510. Other timers could be used as clocksources, with + * higher resolution in free-running counter modes (e.g. 12 MHz xtal), + * but systems won't necessarily want to spend resources that way. + */ +static void __iomem *sync32k_cnt_reg; + +static u64 notrace omap_32k_read_sched_clock(void) +{ + return sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0; +} + +/** + * omap_read_persistent_clock64 - Return time from a persistent clock. + * + * Reads the time from a source which isn't disabled during PM, the + * 32k sync timer. Convert the cycles elapsed since last read into + * nsecs and adds to a monotonically increasing timespec64. + */ +static struct timespec64 persistent_ts; +static cycles_t cycles; +static unsigned int persistent_mult, persistent_shift; + +static void omap_read_persistent_clock64(struct timespec64 *ts) +{ + unsigned long long nsecs; + cycles_t last_cycles; + + last_cycles = cycles; + cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0; + + nsecs = clocksource_cyc2ns(cycles - last_cycles, + persistent_mult, persistent_shift); + + timespec64_add_ns(&persistent_ts, nsecs); + + *ts = persistent_ts; +} + +/** + * omap_init_clocksource_32k - setup and register counter 32k as a + * kernel clocksource + * @pbase: base addr of counter_32k module + * @size: size of counter_32k to map + * + * Returns 0 upon success or negative error code upon failure. + * + */ +int __init omap_init_clocksource_32k(void __iomem *vbase) +{ + int ret; + + /* + * 32k sync Counter IP register offsets vary between the + * highlander version and the legacy ones. + * The 'SCHEME' bits(30-31) of the revision register is used + * to identify the version. + */ + if (readl_relaxed(vbase + OMAP2_32KSYNCNT_REV_OFF) & + OMAP2_32KSYNCNT_REV_SCHEME) + sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_HIGH; + else + sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_LOW; + + /* + * 120000 rough estimate from the calculations in + * __clocksource_update_freq_scale. + */ + clocks_calc_mult_shift(&persistent_mult, &persistent_shift, + 32768, NSEC_PER_SEC, 120000); + + ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768, + 250, 32, clocksource_mmio_readl_up); + if (ret) { + pr_err("32k_counter: can't register clocksource\n"); + return ret; + } + + sched_clock_register(omap_32k_read_sched_clock, 32, 32768); + register_persistent_clock(omap_read_persistent_clock64); + pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n"); + + return 0; +} + /* * --------------------------------------------------------------------------- * Timer initialization @@ -180,7 +270,7 @@ int __init omap_32k_timer_init(void) sync32k_ick = clk_get(NULL, "omap_32ksync_ick"); if (!IS_ERR(sync32k_ick)) - clk_enable(sync32k_ick); + clk_prepare_enable(sync32k_ick); ret = omap_init_clocksource_32k(base); } diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c index e60831c82b78..0119f3ddb7a6 100644 --- a/arch/arm/mach-omap1/usb.c +++ b/arch/arm/mach-omap1/usb.c @@ -12,13 +12,13 @@ #include <linux/dma-map-ops.h> #include <linux/io.h> #include <linux/delay.h> +#include <linux/soc/ti/omap1-io.h> #include <asm/irq.h> -#include <mach/mux.h> - -#include <mach/usb.h> - +#include "hardware.h" +#include "mux.h" +#include "usb.h" #include "common.h" /* These routines should handle the standard chip-specific modes diff --git a/arch/arm/mach-omap1/usb.h b/arch/arm/mach-omap1/usb.h new file mode 100644 index 000000000000..08c9344c46e3 --- /dev/null +++ b/arch/arm/mach-omap1/usb.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * fixme correct answer depends on hmc_mode, + * as does (on omap1) any nonzero value for config->otg port number + */ +#include <linux/platform_data/usb-omap1.h> +#include <linux/soc/ti/omap1-usb.h> + +#if IS_ENABLED(CONFIG_USB_OMAP) +#define is_usb0_device(config) 1 +#else +#define is_usb0_device(config) 0 +#endif + +#if IS_ENABLED(CONFIG_USB_SUPPORT) +void omap1_usb_init(struct omap_usb_config *pdata); +#else +static inline void omap1_usb_init(struct omap_usb_config *pdata) +{ +} +#endif + +#define OMAP1_OHCI_BASE 0xfffba000 +#define OMAP2_OHCI_BASE 0x4805e000 +#define OMAP_OHCI_BASE OMAP1_OHCI_BASE diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 02c253de9b6e..a8adbb4d478a 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -123,6 +123,8 @@ config OMAP_INTERCONNECT_BARRIER bool select ARM_HEAVY_MB +config ARCH_OMAP + bool if ARCH_OMAP2PLUS @@ -153,6 +155,53 @@ config SOC_HAS_REALTIME_COUNTER depends on SOC_OMAP5 || SOC_DRA7XX default y +config POWER_AVS_OMAP + bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2" + depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM + select POWER_SUPPLY + help + Say Y to enable AVS(Adaptive Voltage Scaling) + support on OMAP containing the version 1 or + version 2 of the SmartReflex IP. + V1 is the 65nm version used in OMAP3430. + V2 is the update for the 45nm version of the IP used in OMAP3630 + and OMAP4430 + + Please note, that by default SmartReflex is only + initialized and not enabled. To enable the automatic voltage + compensation for vdd mpu and vdd core from user space, + user must write 1 to + /debug/smartreflex/sr_<X>/autocomp, + where X is mpu_iva or core for OMAP3. + Optionally autocompensation can be enabled in the kernel + by default during system init via the enable_on_init flag + which an be passed as platform data to the smartreflex driver. + +config POWER_AVS_OMAP_CLASS3 + bool "Class 3 mode of Smartreflex Implementation" + depends on POWER_AVS_OMAP && TWL4030_CORE + help + Say Y to enable Class 3 implementation of Smartreflex + + Class 3 implementation of Smartreflex employs continuous hardware + voltage calibration. + +config OMAP3_L2_AUX_SECURE_SAVE_RESTORE + bool "OMAP3 HS/EMU save and restore for L2 AUX control register" + depends on ARCH_OMAP3 && PM + help + Without this option, L2 Auxiliary control register contents are + lost during off-mode entry on HS/EMU devices. This feature + requires support from PPA / boot-loader in HS/EMU devices, which + currently does not exist by default. + +config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID + int "Service ID for the support routine to set L2 AUX control" + depends on OMAP3_L2_AUX_SECURE_SAVE_RESTORE + default 43 + help + PPA routine service ID for setting L2 auxiliary control register. + comment "OMAP Core Type" depends on ARCH_OMAP2 diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c index c98855f5594b..c685afb8bd03 100644 --- a/arch/arm/mach-omap2/sram.c +++ b/arch/arm/mach-omap2/sram.c @@ -18,6 +18,7 @@ #include <asm/fncpy.h> #include <asm/tlb.h> #include <asm/cacheflush.h> +#include <asm/set_memory.h> #include <asm/mach/map.h> @@ -47,8 +48,68 @@ #define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) static unsigned long omap_sram_start; -static unsigned long omap_sram_skip; static unsigned long omap_sram_size; +static void __iomem *omap_sram_base; +static unsigned long omap_sram_skip; +static void __iomem *omap_sram_ceil; + +/* + * Memory allocator for SRAM: calculates the new ceiling address + * for pushing a function using the fncpy API. + * + * Note that fncpy requires the returned address to be aligned + * to an 8-byte boundary. + */ +static void *omap_sram_push_address(unsigned long size) +{ + unsigned long available, new_ceil = (unsigned long)omap_sram_ceil; + + available = omap_sram_ceil - (omap_sram_base + omap_sram_skip); + + if (size > available) { + pr_err("Not enough space in SRAM\n"); + return NULL; + } + + new_ceil -= size; + new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN); + omap_sram_ceil = IOMEM(new_ceil); + + return (void *)omap_sram_ceil; +} + +void *omap_sram_push(void *funcp, unsigned long size) +{ + void *sram; + unsigned long base; + int pages; + void *dst = NULL; + + sram = omap_sram_push_address(size); + if (!sram) + return NULL; + + base = (unsigned long)sram & PAGE_MASK; + pages = PAGE_ALIGN(size) / PAGE_SIZE; + + set_memory_rw(base, pages); + + dst = fncpy(sram, funcp, size); + + set_memory_ro(base, pages); + set_memory_x(base, pages); + + return dst; +} + +/* + * The SRAM context is lost during off-idle and stack + * needs to be reset. + */ +static void omap_sram_reset(void) +{ + omap_sram_ceil = omap_sram_base + omap_sram_size; +} /* * Depending on the target RAMFS firewall setup, the public usable amount of @@ -119,6 +180,8 @@ static void __init omap_detect_sram(void) */ static void __init omap2_map_sram(void) { + unsigned long base; + int pages; int cached = 1; if (cpu_is_omap34xx()) { @@ -132,8 +195,30 @@ static void __init omap2_map_sram(void) cached = 0; } - omap_map_sram(omap_sram_start, omap_sram_size, - omap_sram_skip, cached); + if (omap_sram_size == 0) + return; + + omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE); + omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size, cached); + if (!omap_sram_base) { + pr_err("SRAM: Could not map\n"); + return; + } + + omap_sram_reset(); + + /* + * Looks like we need to preserve some bootloader code at the + * beginning of SRAM for jumping to flash for reboot to work... + */ + memset_io(omap_sram_base + omap_sram_skip, 0, + omap_sram_size - omap_sram_skip); + + base = (unsigned long)omap_sram_base; + pages = PAGE_ALIGN(omap_sram_size) / PAGE_SIZE; + + set_memory_ro(base, pages); + set_memory_x(base, pages); } static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h index 447bd3eed0fd..271062f23482 100644 --- a/arch/arm/mach-omap2/sram.h +++ b/arch/arm/mach-omap2/sram.h @@ -4,7 +4,6 @@ */ #ifndef __ASSEMBLY__ -#include <plat/sram.h> extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, u32 base_cs, u32 force_unlock); @@ -14,6 +13,10 @@ extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); extern void omap3_sram_restore_context(void); +extern int __init omap_sram_init(void); + +extern void *omap_sram_push(void *funcp, unsigned long size); + /* Do not use these */ extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl); extern unsigned long omap24xx_sram_reprogram_clock_sz; diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig deleted file mode 100644 index 272670ef1e92..000000000000 --- a/arch/arm/plat-omap/Kconfig +++ /dev/null @@ -1,119 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -config ARCH_OMAP - bool - -if ARCH_OMAP - -menu "TI OMAP Common Features" - -config ARCH_OMAP_OTG - bool - -comment "OMAP Feature Selections" - -config OMAP_DEBUG_DEVICES - bool - help - For debug cards on TI reference boards. - -config OMAP_DEBUG_LEDS - def_bool y if NEW_LEDS - depends on OMAP_DEBUG_DEVICES - select LEDS_CLASS - -config POWER_AVS_OMAP - bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2" - depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM - select POWER_SUPPLY - help - Say Y to enable AVS(Adaptive Voltage Scaling) - support on OMAP containing the version 1 or - version 2 of the SmartReflex IP. - V1 is the 65nm version used in OMAP3430. - V2 is the update for the 45nm version of the IP used in OMAP3630 - and OMAP4430 - - Please note, that by default SmartReflex is only - initialized and not enabled. To enable the automatic voltage - compensation for vdd mpu and vdd core from user space, - user must write 1 to - /debug/smartreflex/sr_<X>/autocomp, - where X is mpu_iva or core for OMAP3. - Optionally autocompensation can be enabled in the kernel - by default during system init via the enable_on_init flag - which an be passed as platform data to the smartreflex driver. - -config POWER_AVS_OMAP_CLASS3 - bool "Class 3 mode of Smartreflex Implementation" - depends on POWER_AVS_OMAP && TWL4030_CORE - help - Say Y to enable Class 3 implementation of Smartreflex - - Class 3 implementation of Smartreflex employs continuous hardware - voltage calibration. - -config OMAP_RESET_CLOCKS - bool "Reset unused clocks during boot" - depends on ARCH_OMAP - help - Say Y if you want to reset unused clocks during boot. - This option saves power, but assumes all drivers are - using the clock framework. Broken drivers that do not - yet use clock framework may not work with this option. - If you are booting from another operating system, you - probably do not want this option enabled until your - device drivers work properly. - -config OMAP_MPU_TIMER - bool "Use mpu timer" - depends on ARCH_OMAP1 - help - Select this option if you want to use the OMAP mpu timer. This - timer provides more intra-tick resolution than the 32KHz timer, - but consumes more power. - -config OMAP_32K_TIMER - bool "Use 32KHz timer" - depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS - default y if (ARCH_OMAP16XX || ARCH_OMAP2PLUS) - help - Select this option if you want to enable the OMAP 32KHz timer. - This timer saves power compared to the OMAP_MPU_TIMER, and has - support for no tick during idle. The 32KHz timer provides less - intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is - currently only available for OMAP16XX, 24XX, 34XX, OMAP4/5 and DRA7XX. - - On OMAP2PLUS this value is only used for CONFIG_HZ and - CLOCK_TICK_RATE compile time calculation. - The actual timer selection is done in the board file - through the (DT_)MACHINE_START structure. - - -config OMAP3_L2_AUX_SECURE_SAVE_RESTORE - bool "OMAP3 HS/EMU save and restore for L2 AUX control register" - depends on ARCH_OMAP3 && PM - help - Without this option, L2 Auxiliary control register contents are - lost during off-mode entry on HS/EMU devices. This feature - requires support from PPA / boot-loader in HS/EMU devices, which - currently does not exist by default. - -config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID - int "Service ID for the support routine to set L2 AUX control" - depends on OMAP3_L2_AUX_SECURE_SAVE_RESTORE - default 43 - help - PPA routine service ID for setting L2 auxiliary control register. - -config OMAP_SERIAL_WAKE - bool "Enable wake-up events for serial ports" - depends on ARCH_OMAP1 && OMAP_MUX - default y - help - Select this option if you want to have your system wake up - to data on the serial RX line. This allows you to wake the - system from serial console. - -endmenu - -endif diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile deleted file mode 100644 index 371f2ed00eda..000000000000 --- a/arch/arm/plat-omap/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -# -# Makefile for the linux kernel. -# - -ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-omap/include - -# Common support -obj-y := sram.o dma.o counter_32k.o - -# omap_device support (OMAP2+ only at the moment) - -obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c deleted file mode 100644 index 7a729ade2105..000000000000 --- a/arch/arm/plat-omap/counter_32k.c +++ /dev/null @@ -1,114 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * OMAP 32ksynctimer/counter_32k-related code - * - * Copyright (C) 2009 Texas Instruments - * Copyright (C) 2010 Nokia Corporation - * Tony Lindgren <tony@atomide.com> - * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> - * - * NOTE: This timer is not the same timer as the old OMAP1 MPU timer. - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/clocksource.h> -#include <linux/sched_clock.h> - -#include <asm/mach/time.h> - -#include <plat/counter-32k.h> - -/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */ -#define OMAP2_32KSYNCNT_REV_OFF 0x0 -#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30) -#define OMAP2_32KSYNCNT_CR_OFF_LOW 0x10 -#define OMAP2_32KSYNCNT_CR_OFF_HIGH 0x30 - -/* - * 32KHz clocksource ... always available, on pretty most chips except - * OMAP 730 and 1510. Other timers could be used as clocksources, with - * higher resolution in free-running counter modes (e.g. 12 MHz xtal), - * but systems won't necessarily want to spend resources that way. - */ -static void __iomem *sync32k_cnt_reg; - -static u64 notrace omap_32k_read_sched_clock(void) -{ - return sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0; -} - -/** - * omap_read_persistent_clock64 - Return time from a persistent clock. - * - * Reads the time from a source which isn't disabled during PM, the - * 32k sync timer. Convert the cycles elapsed since last read into - * nsecs and adds to a monotonically increasing timespec64. - */ -static struct timespec64 persistent_ts; -static cycles_t cycles; -static unsigned int persistent_mult, persistent_shift; - -static void omap_read_persistent_clock64(struct timespec64 *ts) -{ - unsigned long long nsecs; - cycles_t last_cycles; - - last_cycles = cycles; - cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0; - - nsecs = clocksource_cyc2ns(cycles - last_cycles, - persistent_mult, persistent_shift); - - timespec64_add_ns(&persistent_ts, nsecs); - - *ts = persistent_ts; -} - -/** - * omap_init_clocksource_32k - setup and register counter 32k as a - * kernel clocksource - * @pbase: base addr of counter_32k module - * @size: size of counter_32k to map - * - * Returns 0 upon success or negative error code upon failure. - * - */ -int __init omap_init_clocksource_32k(void __iomem *vbase) -{ - int ret; - - /* - * 32k sync Counter IP register offsets vary between the - * highlander version and the legacy ones. - * The 'SCHEME' bits(30-31) of the revision register is used - * to identify the version. - */ - if (readl_relaxed(vbase + OMAP2_32KSYNCNT_REV_OFF) & - OMAP2_32KSYNCNT_REV_SCHEME) - sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_HIGH; - else - sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_LOW; - - /* - * 120000 rough estimate from the calculations in - * __clocksource_update_freq_scale. - */ - clocks_calc_mult_shift(&persistent_mult, &persistent_shift, - 32768, NSEC_PER_SEC, 120000); - - ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768, - 250, 32, clocksource_mmio_readl_up); - if (ret) { - pr_err("32k_counter: can't register clocksource\n"); - return ret; - } - - sched_clock_register(omap_32k_read_sched_clock, 32, 32768); - register_persistent_clock(omap_read_persistent_clock64); - pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n"); - - return 0; -} diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c deleted file mode 100644 index 2b698d074874..000000000000 --- a/arch/arm/plat-omap/debug-leds.c +++ /dev/null @@ -1,171 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/plat-omap/debug-leds.c - * - * Copyright 2011 by Bryan Wu <bryan.wu@canonical.com> - * Copyright 2003 by Texas Instruments Incorporated - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/leds.h> -#include <linux/io.h> -#include <linux/platform_data/gpio-omap.h> -#include <linux/slab.h> - -#include <asm/mach-types.h> - -/* Many OMAP development platforms reuse the same "debug board"; these - * platforms include H2, H3, H4, and Perseus2. There are 16 LEDs on the - * debug board (all green), accessed through FPGA registers. - */ - -/* NOTE: most boards don't have a static mapping for the FPGA ... */ -struct h2p2_dbg_fpga { - /* offset 0x00 */ - u16 smc91x[8]; - /* offset 0x10 */ - u16 fpga_rev; - u16 board_rev; - u16 gpio_outputs; - u16 leds; - /* offset 0x18 */ - u16 misc_inputs; - u16 lan_status; - u16 lan_reset; - u16 reserved0; - /* offset 0x20 */ - u16 ps2_data; - u16 ps2_ctrl; - /* plus also 4 rs232 ports ... */ -}; - -static struct h2p2_dbg_fpga __iomem *fpga; - -static u16 fpga_led_state; - -struct dbg_led { - struct led_classdev cdev; - u16 mask; -}; - -static const struct { - const char *name; - const char *trigger; -} dbg_leds[] = { - { "dbg:d4", "heartbeat", }, - { "dbg:d5", "cpu0", }, - { "dbg:d6", "default-on", }, - { "dbg:d7", }, - { "dbg:d8", }, - { "dbg:d9", }, - { "dbg:d10", }, - { "dbg:d11", }, - { "dbg:d12", }, - { "dbg:d13", }, - { "dbg:d14", }, - { "dbg:d15", }, - { "dbg:d16", }, - { "dbg:d17", }, - { "dbg:d18", }, - { "dbg:d19", }, -}; - -/* - * The triggers lines up below will only be used if the - * LED triggers are compiled in. - */ -static void dbg_led_set(struct led_classdev *cdev, - enum led_brightness b) -{ - struct dbg_led *led = container_of(cdev, struct dbg_led, cdev); - u16 reg; - - reg = readw_relaxed(&fpga->leds); - if (b != LED_OFF) - reg |= led->mask; - else - reg &= ~led->mask; - writew_relaxed(reg, &fpga->leds); -} - -static enum led_brightness dbg_led_get(struct led_classdev *cdev) -{ - struct dbg_led *led = container_of(cdev, struct dbg_led, cdev); - u16 reg; - - reg = readw_relaxed(&fpga->leds); - return (reg & led->mask) ? LED_FULL : LED_OFF; -} - -static int fpga_probe(struct platform_device *pdev) -{ - struct resource *iomem; - int i; - - iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!iomem) - return -ENODEV; - - fpga = ioremap(iomem->start, resource_size(iomem)); - writew_relaxed(0xff, &fpga->leds); - - for (i = 0; i < ARRAY_SIZE(dbg_leds); i++) { - struct dbg_led *led; - - led = kzalloc(sizeof(*led), GFP_KERNEL); - if (!led) - break; - - led->cdev.name = dbg_leds[i].name; - led->cdev.brightness_set = dbg_led_set; - led->cdev.brightness_get = dbg_led_get; - led->cdev.default_trigger = dbg_leds[i].trigger; - led->mask = BIT(i); - - if (led_classdev_register(NULL, &led->cdev) < 0) { - kfree(led); - break; - } - } - - return 0; -} - -static int fpga_suspend_noirq(struct device *dev) -{ - fpga_led_state = readw_relaxed(&fpga->leds); - writew_relaxed(0xff, &fpga->leds); - - return 0; -} - -static int fpga_resume_noirq(struct device *dev) -{ - writew_relaxed(~fpga_led_state, &fpga->leds); - return 0; -} - -static const struct dev_pm_ops fpga_dev_pm_ops = { - .suspend_noirq = fpga_suspend_noirq, - .resume_noirq = fpga_resume_noirq, -}; - -static struct platform_driver led_driver = { - .driver.name = "omap_dbg_led", - .driver.pm = &fpga_dev_pm_ops, - .probe = fpga_probe, -}; - -static int __init fpga_init(void) -{ - if (machine_is_omap_h4() - || machine_is_omap_h3() - || machine_is_omap_h2() - || machine_is_omap_perseus2() - ) - return platform_driver_register(&led_driver); - return 0; -} -fs_initcall(fpga_init); diff --git a/arch/arm/plat-omap/include/plat/counter-32k.h b/arch/arm/plat-omap/include/plat/counter-32k.h deleted file mode 100644 index da000d482ff2..000000000000 --- a/arch/arm/plat-omap/include/plat/counter-32k.h +++ /dev/null @@ -1 +0,0 @@ -int omap_init_clocksource_32k(void __iomem *vbase); diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h deleted file mode 100644 index 36f4c352cc66..000000000000 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * OMAP cpu type detection - * - * Copyright (C) 2004, 2008 Nokia Corporation - * - * Copyright (C) 2009-11 Texas Instruments. - * - * Written by Tony Lindgren <tony.lindgren@nokia.com> - * - * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com> - */ - -#ifndef __ASM_ARCH_OMAP_CPU_H -#define __ASM_ARCH_OMAP_CPU_H - -#ifdef CONFIG_ARCH_OMAP1 -#include <mach/soc.h> -#endif - -#endif diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h deleted file mode 100644 index 30a07730807a..000000000000 --- a/arch/arm/plat-omap/include/plat/sram.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -int omap_sram_init(void); - -void omap_map_sram(unsigned long start, unsigned long size, - unsigned long skip, int cached); -void omap_sram_reset(void); - -extern void *omap_sram_push(void *funcp, unsigned long size); diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c deleted file mode 100644 index 0f1eacad7fe3..000000000000 --- a/arch/arm/plat-omap/sram.c +++ /dev/null @@ -1,129 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/plat-omap/sram.c - * - * OMAP SRAM detection and management - * - * Copyright (C) 2005 Nokia Corporation - * Written by Tony Lindgren <tony@atomide.com> - * - * Copyright (C) 2009-2012 Texas Instruments - * Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com> - */ -#undef DEBUG - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/io.h> - -#include <asm/fncpy.h> -#include <asm/tlb.h> -#include <asm/cacheflush.h> -#include <asm/set_memory.h> - -#include <asm/mach/map.h> - -#include <plat/sram.h> - -#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) - -static void __iomem *omap_sram_base; -static unsigned long omap_sram_skip; -static unsigned long omap_sram_size; -static void __iomem *omap_sram_ceil; - -/* - * Memory allocator for SRAM: calculates the new ceiling address - * for pushing a function using the fncpy API. - * - * Note that fncpy requires the returned address to be aligned - * to an 8-byte boundary. - */ -static void *omap_sram_push_address(unsigned long size) -{ - unsigned long available, new_ceil = (unsigned long)omap_sram_ceil; - - available = omap_sram_ceil - (omap_sram_base + omap_sram_skip); - - if (size > available) { - pr_err("Not enough space in SRAM\n"); - return NULL; - } - - new_ceil -= size; - new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN); - omap_sram_ceil = IOMEM(new_ceil); - - return (void *)omap_sram_ceil; -} - -void *omap_sram_push(void *funcp, unsigned long size) -{ - void *sram; - unsigned long base; - int pages; - void *dst = NULL; - - sram = omap_sram_push_address(size); - if (!sram) - return NULL; - - base = (unsigned long)sram & PAGE_MASK; - pages = PAGE_ALIGN(size) / PAGE_SIZE; - - set_memory_rw(base, pages); - - dst = fncpy(sram, funcp, size); - - set_memory_ro(base, pages); - set_memory_x(base, pages); - - return dst; -} - -/* - * The SRAM context is lost during off-idle and stack - * needs to be reset. - */ -void omap_sram_reset(void) -{ - omap_sram_ceil = omap_sram_base + omap_sram_size; -} - -/* - * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early. - */ -void __init omap_map_sram(unsigned long start, unsigned long size, - unsigned long skip, int cached) -{ - unsigned long base; - int pages; - - if (size == 0) - return; - - start = ROUND_DOWN(start, PAGE_SIZE); - omap_sram_size = size; - omap_sram_skip = skip; - omap_sram_base = __arm_ioremap_exec(start, size, cached); - if (!omap_sram_base) { - pr_err("SRAM: Could not map\n"); - return; - } - - omap_sram_reset(); - - /* - * Looks like we need to preserve some bootloader code at the - * beginning of SRAM for jumping to flash for reboot to work... - */ - memset_io(omap_sram_base + omap_sram_skip, 0, - omap_sram_size - omap_sram_skip); - - base = (unsigned long)omap_sram_base; - pages = PAGE_ALIGN(omap_sram_size) / PAGE_SIZE; - - set_memory_ro(base, pages); - set_memory_x(base, pages); -} |