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authorIcenowy Zheng <icenowy@aosc.io>2019-07-28 11:12:25 +0800
committerMaxime Ripard <maxime.ripard@bootlin.com>2019-08-23 09:14:48 +0200
commit11d1bdead79c0df33ba831d307af76730e4c1559 (patch)
tree123bb10e2fe4c2517b5862810c866ceb8758d2d0 /arch
parentdt-bindings: arm: sunxi: add binding for Lichee Zero Plus core board (diff)
downloadlinux-dev-11d1bdead79c0df33ba831d307af76730e4c1559.tar.xz
linux-dev-11d1bdead79c0df33ba831d307af76730e4c1559.zip
ARM: sunxi: dts: s3/s3l/v3: add DTSI files for S3/S3L/V3 SoCs
The Allwinner S3/S3L/V3 SoCs all share the same die with the V3s SoC, but with more GPIO wired out of the package. Add a DTSI file for these SoCs. It just replaces some compatible strings of the V3s DTSI now. As these SoCs share the same feature set on Linux, we use the first known chip (V3) as the file's name. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/sun8i-v3.dtsi14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi b/arch/arm/boot/dts/sun8i-v3.dtsi
new file mode 100644
index 000000000000..6ae8645ade50
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-v3.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
+ */
+
+#include "sun8i-v3s.dtsi"
+
+&ccu {
+ compatible = "allwinner,sun8i-v3-ccu";
+};
+
+&pio {
+ compatible = "allwinner,sun8i-v3-pinctrl";
+};