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| author |   Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> | 2010-02-15 10:03:32 -0800 |
|---|---|---|
| committer |   Tony Lindgren <tony@atomide.com> | 2010-02-15 10:03:32 -0800 |
| commit | 14f796375b5c2bcc27986de12b6f769ec3827f36 (patch) | |
| tree | efe6dac184858a708d0c0744ba32090b603fa640 /arch | |
| parent | omap iommu: fix incorrect address for largepage 1st entry (diff) | |
| download | linux-dev-14f796375b5c2bcc27986de12b6f769ec3827f36.tar.xz linux-dev-14f796375b5c2bcc27986de12b6f769ec3827f36.zip | |
omap: McBSP: Use macros for all register read/write operations
There are several places where readw()/writew() functions are used instead of
OMAP_MCBSP_READ()/WRITE() macros for manipulating McBSP registers. Replace
them with macros to ensure consistent behaviour after caching is introduced.
Tested on OMAP1510 based Amstrad Delta.
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/plat-omap/mcbsp.c | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index c1eb61529394..eaaf53bb8395 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -636,26 +636,26 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf) mcbsp = id_to_mcbsp_ptr(id); base = mcbsp->io_base; - writew(buf, base + OMAP_MCBSP_REG_DXR1); + OMAP_MCBSP_WRITE(base, DXR1, buf); /* if frame sync error - clear the error */ - if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) { + if (OMAP_MCBSP_READ(base, SPCR2) & XSYNC_ERR) { /* clear error */ - writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR), - base + OMAP_MCBSP_REG_SPCR2); + OMAP_MCBSP_WRITE(base, SPCR2, + OMAP_MCBSP_READ(base, SPCR2) & (~XSYNC_ERR)); /* resend */ return -1; } else { /* wait for transmit confirmation */ int attemps = 0; - while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) { + while (!(OMAP_MCBSP_READ(base, SPCR2) & XRDY)) { if (attemps++ > 1000) { - writew(readw(base + OMAP_MCBSP_REG_SPCR2) & - (~XRST), - base + OMAP_MCBSP_REG_SPCR2); + OMAP_MCBSP_WRITE(base, SPCR2, + OMAP_MCBSP_READ(base, SPCR2) & + (~XRST)); udelay(10); - writew(readw(base + OMAP_MCBSP_REG_SPCR2) | - (XRST), - base + OMAP_MCBSP_REG_SPCR2); + OMAP_MCBSP_WRITE(base, SPCR2, + OMAP_MCBSP_READ(base, SPCR2) | + (XRST)); udelay(10); dev_err(mcbsp->dev, "Could not write to" " McBSP%d Register\n", mcbsp->id); @@ -681,24 +681,24 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf) base = mcbsp->io_base; /* if frame sync error - clear the error */ - if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) { + if (OMAP_MCBSP_READ(base, SPCR1) & RSYNC_ERR) { /* clear error */ - writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR), - base + OMAP_MCBSP_REG_SPCR1); + OMAP_MCBSP_WRITE(base, SPCR1, + OMAP_MCBSP_READ(base, SPCR1) & (~RSYNC_ERR)); /* resend */ return -1; } else { /* wait for recieve confirmation */ int attemps = 0; - while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) { + while (!(OMAP_MCBSP_READ(base, SPCR1) & RRDY)) { if (attemps++ > 1000) { - writew(readw(base + OMAP_MCBSP_REG_SPCR1) & - (~RRST), - base + OMAP_MCBSP_REG_SPCR1); + OMAP_MCBSP_WRITE(base, SPCR1, + OMAP_MCBSP_READ(base, SPCR1) & + (~RRST)); udelay(10); - writew(readw(base + OMAP_MCBSP_REG_SPCR1) | - (RRST), - base + OMAP_MCBSP_REG_SPCR1); + OMAP_MCBSP_WRITE(base, SPCR1, + OMAP_MCBSP_READ(base, SPCR1) | + (RRST)); udelay(10); dev_err(mcbsp->dev, "Could not read from" " McBSP%d Register\n", mcbsp->id); @@ -706,7 +706,7 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf) } } } - *buf = readw(base + OMAP_MCBSP_REG_DRR1); + *buf = OMAP_MCBSP_READ(base, DRR1); return 0; } |