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authorDavid Daney <ddaney@avtrex.com>2008-09-23 00:09:51 -0700
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 16:18:57 +0100
commit2c708cbaa6031b73be6b992adb3ec1811f91cdb1 (patch)
treeb15c8a7dc03c534cb40e742398e4cf539aa326b4 /arch
parentMIPS: Watch exception handling for HARDWARE_WATCHPOINTS. (diff)
downloadlinux-dev-2c708cbaa6031b73be6b992adb3ec1811f91cdb1.tar.xz
linux-dev-2c708cbaa6031b73be6b992adb3ec1811f91cdb1.zip
MIPS: Scheduler support for HARDWARE_WATCHPOINTS.
Here we hook up the scheduler. Whenever we switch to a new process, we check to see if the watch registers should be installed, and do it if needed. Signed-off-by: David Daney <ddaney@avtrex.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/include/asm/system.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h
index a944eda4faf5..cd30f83235bb 100644
--- a/arch/mips/include/asm/system.h
+++ b/arch/mips/include/asm/system.h
@@ -20,6 +20,7 @@
#include <asm/cmpxchg.h>
#include <asm/cpu-features.h>
#include <asm/dsp.h>
+#include <asm/watch.h>
#include <asm/war.h>
@@ -76,6 +77,7 @@ do { \
__restore_dsp(current); \
if (cpu_has_userlocal) \
write_c0_userlocal(current_thread_info()->tp_value); \
+ __restore_watch(); \
} while (0)
static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)