diff options
| author |   Linus Torvalds <torvalds@linux-foundation.org> | 2016-08-01 18:36:01 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-08-01 18:36:01 -0400 |
| commit | 43a0a98aa8da71583f84b84fd72e265c24d4c5f8 (patch) | |
| tree | 3830aff2b36f48a67be5f485f00f56cf4269729d /arch | |
| parent | Merge tag 'armsoc-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc (diff) | |
| parent | Merge tag 'samsung-drivers-4.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers (diff) | |
| download | linux-dev-43a0a98aa8da71583f84b84fd72e265c24d4c5f8.tar.xz linux-dev-43a0a98aa8da71583f84b84fd72e265c24d4c5f8.zip | |
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Driver updates for ARM SoCs.
A slew of changes this release cycle. The reset driver tree, that we
merge through arm-soc for historical reasons, is also sizable this
time around.
Among the changes:
- clps711x: Treewide changes to compatible strings, merged here for simplicity.
- Qualcomm: SCM firmware driver cleanups, move to platform driver
- ux500: Major cleanups, removal of old mach-specific infrastructure.
- Atmel external bus memory driver
- Move of brcmstb platform to the rest of bcm
- PMC driver updates for tegra, various fixes and improvements
- Samsung platform driver updates to support 64-bit Exynos platforms
- Reset controller cleanups moving to devm_reset_controller_register() APIs
- Reset controller driver for Amlogic Meson
- Reset controller driver for Hisilicon hi6220
- ARM SCPI power domain support"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (100 commits)
ARM: ux500: consolidate base platform files
ARM: ux500: move soc_id driver to drivers/soc
ARM: ux500: call ux500_setup_id later
ARM: ux500: consolidate soc_device code in id.c
ARM: ux500: remove cpu_is_u* helpers
ARM: ux500: use CLK_OF_DECLARE()
ARM: ux500: move l2x0 init to .init_irq
mfd: db8500 stop passing around platform data
ASoC: ab8500-codec: remove platform data based probe
ARM: ux500: move ab8500_regulator_plat_data into driver
ARM: ux500: remove unused regulator data
soc: raspberrypi-power: add CONFIG_OF dependency
firmware: scpi: add CONFIG_OF dependency
video: clps711x-fb: Changing the compatibility string to match with the smallest supported chip
input: clps711x-keypad: Changing the compatibility string to match with the smallest supported chip
pwm: clps711x: Changing the compatibility string to match with the smallest supported chip
serial: clps711x: Changing the compatibility string to match with the smallest supported chip
irqchip: clps711x: Changing the compatibility string to match with the smallest supported chip
clocksource: clps711x: Changing the compatibility string to match with the smallest supported chip
clk: clps711x: Changing the compatibility string to match with the smallest supported chip
...
Diffstat (limited to 'arch')
33 files changed, 153 insertions, 2024 deletions
diff --git a/arch/arm/boot/dts/exynos-mfc-reserved-memory.dtsi b/arch/arm/boot/dts/exynos-mfc-reserved-memory.dtsi new file mode 100644 index 000000000000..c4d063ae6b74 --- /dev/null +++ b/arch/arm/boot/dts/exynos-mfc-reserved-memory.dtsi @@ -0,0 +1,29 @@ +/* + * Samsung's Exynos SoC MFC (Video Codec) reserved memory common definition. + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/ { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mfc_left: region@51000000 { + compatible = "shared-dma-pool"; + no-map; + reg = <0x51000000 0x800000>; + }; + + mfc_right: region@43000000 { + compatible = "shared-dma-pool"; + no-map; + reg = <0x43000000 0x800000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index ad7394c1d67a..f5e4eb23aa21 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts @@ -18,6 +18,7 @@ #include "exynos4210.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> +#include "exynos-mfc-reserved-memory.dtsi" / { model = "Insignal Origen evaluation board based on Exynos4210"; @@ -288,8 +289,7 @@ }; &mfc { - samsung,mfc-r = <0x43000000 0x800000>; - samsung,mfc-l = <0x51000000 0x800000>; + memory-region = <&mfc_left>, <&mfc_right>; status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts index 94ca7d36ab37..de917f0d907d 100644 --- a/arch/arm/boot/dts/exynos4210-smdkv310.dts +++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts @@ -17,6 +17,7 @@ /dts-v1/; #include "exynos4210.dtsi" #include <dt-bindings/gpio/gpio.h> +#include "exynos-mfc-reserved-memory.dtsi" / { model = "Samsung smdkv310 evaluation board based on Exynos4210"; @@ -133,8 +134,7 @@ }; &mfc { - samsung,mfc-r = <0x43000000 0x800000>; - samsung,mfc-l = <0x51000000 0x800000>; + memory-region = <&mfc_left>, <&mfc_right>; status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index ec7619a384a2..276ac9a7bb82 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -13,6 +13,7 @@ #include "exynos4412.dtsi" #include "exynos4412-ppmu-common.dtsi" #include <dt-bindings/gpio/gpio.h> +#include "exynos-mfc-reserved-memory.dtsi" / { chosen { @@ -499,6 +500,11 @@ clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; }; +&mfc { + memory-region = <&mfc_left>, <&mfc_right>; + status = "okay"; +}; + &mixer { status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts index 8bca699b7f20..cd363d7e4e34 100644 --- a/arch/arm/boot/dts/exynos4412-origen.dts +++ b/arch/arm/boot/dts/exynos4412-origen.dts @@ -16,6 +16,7 @@ #include "exynos4412.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> +#include "exynos-mfc-reserved-memory.dtsi" / { model = "Insignal Origen evaluation board based on Exynos4412"; @@ -466,8 +467,7 @@ }; &mfc { - samsung,mfc-r = <0x43000000 0x800000>; - samsung,mfc-l = <0x51000000 0x800000>; + memory-region = <&mfc_left>, <&mfc_right>; status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts index a51069f3c03b..9b6d561dbdac 100644 --- a/arch/arm/boot/dts/exynos4412-smdk4412.dts +++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts @@ -14,6 +14,7 @@ /dts-v1/; #include "exynos4412.dtsi" +#include "exynos-mfc-reserved-memory.dtsi" / { model = "Samsung SMDK evaluation board based on Exynos4412"; @@ -112,8 +113,7 @@ }; &mfc { - samsung,mfc-r = <0x43000000 0x800000>; - samsung,mfc-l = <0x51000000 0x800000>; + memory-region = <&mfc_left>, <&mfc_right>; status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 85dad29c08dc..39940f4bd556 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -14,6 +14,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/input/input.h> #include "exynos5250.dtsi" +#include "exynos-mfc-reserved-memory.dtsi" / { model = "Insignal Arndale evaluation board based on EXYNOS5250"; @@ -516,8 +517,7 @@ }; &mfc { - samsung,mfc-r = <0x43000000 0x800000>; - samsung,mfc-l = <0x51000000 0x800000>; + memory-region = <&mfc_left>, <&mfc_right>; }; &mmc_0 { diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index b7992b13c9de..9fac874af5eb 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -13,6 +13,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #include "exynos5250.dtsi" +#include "exynos-mfc-reserved-memory.dtsi" / { model = "SAMSUNG SMDK5250 board based on EXYNOS5250"; @@ -344,8 +345,7 @@ }; &mfc { - samsung,mfc-r = <0x43000000 0x800000>; - samsung,mfc-l = <0x51000000 0x800000>; + memory-region = <&mfc_left>, <&mfc_right>; }; &mmc_0 { diff --git a/arch/arm/boot/dts/exynos5250-spring.dts b/arch/arm/boot/dts/exynos5250-spring.dts index ac291f540812..784130bdb6a3 100644 --- a/arch/arm/boot/dts/exynos5250-spring.dts +++ b/arch/arm/boot/dts/exynos5250-spring.dts @@ -14,6 +14,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/input/input.h> #include "exynos5250.dtsi" +#include "exynos-mfc-reserved-memory.dtsi" / { model = "Google Spring"; @@ -425,8 +426,7 @@ }; &mfc { - samsung,mfc-r = <0x43000000 0x800000>; - samsung,mfc-l = <0x51000000 0x800000>; + memory-region = <&mfc_left>, <&mfc_right>; }; &mmc_0 { diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 60bc861d0f9d..b8b5f3ae2942 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -16,6 +16,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/input/input.h> #include <dt-bindings/clock/samsung,s2mps11.h> +#include "exynos-mfc-reserved-memory.dtsi" / { model = "Insignal Arndale Octa evaluation board based on EXYNOS5420"; @@ -347,8 +348,7 @@ }; &mfc { - samsung,mfc-r = <0x43000000 0x800000>; - samsung,mfc-l = <0x51000000 0x800000>; + memory-region = <&mfc_left>, <&mfc_right>; }; &mmc_0 { diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts index 1de972d46a87..6b6766e3d90a 100644 --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts @@ -16,6 +16,7 @@ #include <dt-bindings/regulator/maxim,max77802.h> #include "exynos5420.dtsi" #include "exynos5420-cpus.dtsi" +#include "exynos-mfc-reserved-memory.dtsi" / { model = "Google Peach Pit Rev 6+"; @@ -702,8 +703,7 @@ }; &mfc { - samsung,mfc-r = <0x43000000 0x800000>; - samsung,mfc-l = <0x51000000 0x800000>; + memory-region = <&mfc_left>, <&mfc_right>; }; &mmc_0 { diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index 2e748d19322f..5206f41e548d 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -13,6 +13,7 @@ #include "exynos5420.dtsi" #include "exynos5420-cpus.dtsi" #include <dt-bindings/gpio/gpio.h> +#include "exynos-mfc-reserved-memory.dtsi" / { model = "Samsung SMDK5420 board based on EXYNOS5420"; @@ -355,8 +356,7 @@ }; &mfc { - samsung,mfc-r = <0x43000000 0x800000>; - samsung,mfc-l = <0x51000000 0x800000>; + memory-region = <&mfc_left>, <&mfc_right>; }; &mmc_0 { diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index 2a4e10bc8801..7c2335f18bfc 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -17,6 +17,7 @@ #include "exynos5800.dtsi" #include "exynos5422-cpus.dtsi" #include "exynos5422-cpu-thermal.dtsi" +#include "exynos-mfc-reserved-memory.dtsi" / { memory { @@ -406,8 +407,7 @@ }; &mfc { - samsung,mfc-r = <0x43000000 0x800000>; - samsung,mfc-l = <0x51000000 0x800000>; + memory-region = <&mfc_left>, <&mfc_right>; }; &mmc_0 { diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index 62ceb89e073f..1f735963ca98 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -16,6 +16,7 @@ #include <dt-bindings/regulator/maxim,max77802.h> #include "exynos5800.dtsi" #include "exynos5420-cpus.dtsi" +#include "exynos-mfc-reserved-memory.dtsi" / { model = "Google Peach Pi Rev 10+"; @@ -670,8 +671,7 @@ }; &mfc { - samsung,mfc-r = <0x43000000 0x800000>; - samsung,mfc-l = <0x51000000 0x800000>; + memory-region = <&mfc_left>, <&mfc_right>; }; &mmc_0 { diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index ecf139f31c4c..8f820de890b4 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -18,6 +18,7 @@ menuconfig ARCH_EXYNOS select EXYNOS_THERMAL select EXYNOS_PMU select EXYNOS_SROM + select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS select GPIOLIB select HAVE_ARM_SCU if SMP select HAVE_S3C2410_I2C if I2C diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index 34d29df3e006..9ea6c54645ad 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -13,7 +13,6 @@ obj-$(CONFIG_ARCH_EXYNOS) += exynos.o exynos-smc.o firmware.o obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o obj-$(CONFIG_PM_SLEEP) += suspend.o -obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o @@ -23,5 +22,3 @@ AFLAGS_sleep.o :=-Wa,-march=armv7-a$(plus_sec) obj-$(CONFIG_EXYNOS5420_MCPM) += mcpm-exynos.o CFLAGS_mcpm-exynos.o += -march=armv7-a - -obj-$(CONFIG_S5P_DEV_MFC) += s5p-dev-mfc.o diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index ecbfa5dd3c54..acabf0bffc5d 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -27,7 +27,6 @@ #include <plat/cpu.h> #include "common.h" -#include "mfc.h" static struct map_desc exynos4_iodesc[] __initdata = { { @@ -235,23 +234,6 @@ static char const *const exynos_dt_compat[] __initconst = { NULL }; -static void __init exynos_reserve(void) -{ -#ifdef CONFIG_S5P_DEV_MFC - int i; - char *mfc_mem[] = { - "samsung,mfc-v5", - "samsung,mfc-v6", - "samsung,mfc-v7", - "samsung,mfc-v8", - }; - - for (i = 0; i < ARRAY_SIZE(mfc_mem); i++) - if (of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, mfc_mem[i])) - break; -#endif -} - static void __init exynos_dt_fixup(void) { /* @@ -273,6 +255,5 @@ DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)") .init_machine = exynos_dt_machine_init, .init_late = exynos_init_late, .dt_compat = exynos_dt_compat, - .reserve = exynos_reserve, .dt_fixup = exynos_dt_fixup, MACHINE_END diff --git a/arch/arm/mach-exynos/mfc.h b/arch/arm/mach-exynos/mfc.h deleted file mode 100644 index dec93cd5b3c6..000000000000 --- a/arch/arm/mach-exynos/mfc.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (C) 2013 Samsung Electronics Co.Ltd - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __MACH_EXYNOS_MFC_H -#define __MACH_EXYNOS_MFC_H __FILE__ - -int __init s5p_fdt_alloc_mfc_mem(unsigned long node, const char *uname, - int depth, void *data); - -#endif /* __MACH_EXYNOS_MFC_H */ diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c deleted file mode 100644 index 0e075d96ccd4..000000000000 --- a/arch/arm/mach-exynos/pm_domains.c +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Exynos Generic power domain support. - * - * Copyright (c) 2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Implementation of Exynos specific power domain control which is used in - * conjunction with runtime-pm. Support for both device-tree and non-device-tree - * based power domain support is included. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/io.h> -#include <linux/err.h> -#include <linux/slab.h> -#include <linux/pm_domain.h> -#include <linux/clk.h> -#include <linux/delay.h> -#include <linux/of_address.h> -#include <linux/of_platform.h> -#include <linux/sched.h> - -#define INT_LOCAL_PWR_EN 0x7 -#define MAX_CLK_PER_DOMAIN 4 - -/* - * Exynos specific wrapper around the generic power domain - */ -struct exynos_pm_domain { - void __iomem *base; - char const *name; - bool is_off; - struct generic_pm_domain pd; - struct clk *oscclk; - struct clk *clk[MAX_CLK_PER_DOMAIN]; - struct clk *pclk[MAX_CLK_PER_DOMAIN]; - struct clk *asb_clk[MAX_CLK_PER_DOMAIN]; -}; - -static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) -{ - struct exynos_pm_domain *pd; - void __iomem *base; - u32 timeout, pwr; - char *op; - int i; - - pd = container_of(domain, struct exynos_pm_domain, pd); - base = pd->base; - - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - if (IS_ERR(pd->asb_clk[i])) - break; - clk_prepare_enable(pd->asb_clk[i]); - } - - /* Set oscclk before powering off a domain*/ - if (!power_on) { - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - if (IS_ERR(pd->clk[i])) - break; - pd->pclk[i] = clk_get_parent(pd->clk[i]); - if (clk_set_parent(pd->clk[i], pd->oscclk)) - pr_err("%s: error setting oscclk as parent to clock %d\n", - pd->name, i); - } - } - - pwr = power_on ? INT_LOCAL_PWR_EN : 0; - writel_relaxed(pwr, base); - - /* Wait max 1ms */ - timeout = 10; - - while ((readl_relaxed(base + 0x4) & INT_LOCAL_PWR_EN) != pwr) { - if (!timeout) { - op = (power_on) ? "enable" : "disable"; - pr_err("Power domain %s %s failed\n", domain->name, op); - return -ETIMEDOUT; - } - timeout--; - cpu_relax(); - usleep_range(80, 100); - } - - /* Restore clocks after powering on a domain*/ - if (power_on) { - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - if (IS_ERR(pd->clk[i])) - break; - - if (IS_ERR(pd->pclk[i])) - continue; /* Skip on first power up */ - if (clk_set_parent(pd->clk[i], pd->pclk[i])) - pr_err("%s: error setting parent to clock%d\n", - pd->name, i); - } - } - - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - if (IS_ERR(pd->asb_clk[i])) - break; - clk_disable_unprepare(pd->asb_clk[i]); - } - - return 0; -} - -static int exynos_pd_power_on(struct generic_pm_domain *domain) -{ - return exynos_pd_power(domain, true); -} - -static int exynos_pd_power_off(struct generic_pm_domain *domain) -{ - return exynos_pd_power(domain, false); -} - -static __init int exynos4_pm_init_power_domain(void) -{ - struct device_node *np; - - for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") { - struct exynos_pm_domain *pd; - int on, i; - - pd = kzalloc(sizeof(*pd), GFP_KERNEL); - if (!pd) { - pr_err("%s: failed to allocate memory for domain\n", - __func__); - of_node_put(np); - return -ENOMEM; - } - pd->pd.name = kstrdup_const(strrchr(np->full_name, '/') + 1, - GFP_KERNEL); - if (!pd->pd.name) { - kfree(pd); - of_node_put(np); - return -ENOMEM; - } - - pd->name = pd->pd.name; - pd->base = of_iomap(np, 0); - if (!pd->base) { - pr_warn("%s: failed to map memory\n", __func__); - kfree_const(pd->pd.name); - kfree(pd); - continue; - } - - pd->pd.power_off = exynos_pd_power_off; - pd->pd.power_on = exynos_pd_power_on; - - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - char clk_name[8]; - - snprintf(clk_name, sizeof(clk_name), "asb%d", i); - pd->asb_clk[i] = of_clk_get_by_name(np, clk_name); - if (IS_ERR(pd->asb_clk[i])) - break; - } - - pd->oscclk = of_clk_get_by_name(np, "oscclk"); - if (IS_ERR(pd->oscclk)) - goto no_clk; - - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - char clk_name[8]; - - snprintf(clk_name, sizeof(clk_name), "clk%d", i); - pd->clk[i] = of_clk_get_by_name(np, clk_name); - if (IS_ERR(pd->clk[i])) - break; - /* - * Skip setting parent on first power up. - * The parent at this time may not be useful at all. - */ - pd->pclk[i] = ERR_PTR(-EINVAL); - } - - if (IS_ERR(pd->clk[0])) - clk_put(pd->oscclk); - -no_clk: - on = readl_relaxed(pd->base + 0x4) & INT_LOCAL_PWR_EN; - - pm_genpd_init(&pd->pd, NULL, !on); - of_genpd_add_provider_simple(np, &pd->pd); - } - - /* Assign the child power domains to their parents */ - for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") { - struct generic_pm_domain *child_domain, *parent_domain; - struct of_phandle_args args; - - args.np = np; - args.args_count = 0; - child_domain = of_genpd_get_from_provider(&args); - if (IS_ERR(child_domain)) - continue; - - if (of_parse_phandle_with_args(np, "power-domains", - "#power-domain-cells", 0, &args) != 0) - continue; - - parent_domain = of_genpd_get_from_provider(&args); - if (IS_ERR(parent_domain)) - continue; - - if (pm_genpd_add_subdomain(parent_domain, child_domain)) - pr_warn("%s failed to add subdomain: %s\n", - parent_domain->name, child_domain->name); - else - pr_info("%s has as child subdomain: %s.\n", - parent_domain->name, child_domain->name); - } - - return 0; -} -core_initcall(exynos4_pm_init_power_domain); diff --git a/arch/arm/mach-exynos/s5p-dev-mfc.c b/arch/arm/mach-exynos/s5p-dev-mfc.c deleted file mode 100644 index 8ef1f3ee4e98..000000000000 --- a/arch/arm/mach-exynos/s5p-dev-mfc.c +++ /dev/null @@ -1,93 +0,0 @@ -/* - * Copyright (C) 2010-2011 Samsung Electronics Co.Ltd - * - * Base S5P MFC resource and device definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/dma-mapping.h> -#include <linux/memblock.h> -#include <linux/ioport.h> -#include <linux/of_fdt.h> -#include <linux/of.h> - -static struct platform_device s5p_device_mfc_l; -static struct platform_device s5p_device_mfc_r; - -struct s5p_mfc_dt_meminfo { - unsigned long loff; - unsigned long lsize; - unsigned long roff; - unsigned long rsize; - char *compatible; -}; - -struct s5p_mfc_reserved_mem { - phys_addr_t base; - unsigned long size; - struct device *dev; -}; - -static struct s5p_mfc_reserved_mem s5p_mfc_mem[2] __initdata; - - -static void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, - phys_addr_t lbase, unsigned int lsize) -{ - int i; - - s5p_mfc_mem[0].dev = &s5p_device_mfc_r.dev; - s5p_mfc_mem[0].base = rbase; - s5p_mfc_mem[0].size = rsize; - - s5p_mfc_mem[1].dev = &s5p_device_mfc_l.dev; - s5p_mfc_mem[1].base = lbase; - s5p_mfc_mem[1].size = lsize; - - for (i = 0; i < ARRAY_SIZE(s5p_mfc_mem); i++) { - struct s5p_mfc_reserved_mem *area = &s5p_mfc_mem[i]; - if (memblock_remove(area->base, area->size)) { - printk(KERN_ERR "Failed to reserve memory for MFC device (%ld bytes at 0x%08lx)\n", - area->size, (unsigned long) area->base); - area->base = 0; - } - } -} - -int __init s5p_fdt_alloc_mfc_mem(unsigned long node, const char *uname, - int depth, void *data) -{ - const __be32 *prop; - int len; - struct s5p_mfc_dt_meminfo mfc_mem; - - if (!data) - return 0; - - if (!of_flat_dt_is_compatible(node, data)) - return 0; - - prop = of_get_flat_dt_prop(node, "samsung,mfc-l", &len); - if (!prop || (len != 2 * sizeof(unsigned long))) - return 0; - - mfc_mem.loff = be32_to_cpu(prop[0]); - mfc_mem.lsize = be32_to_cpu(prop[1]); - - prop = of_get_flat_dt_prop(node, "samsung,mfc-r", &len); - if (!prop || (len != 2 * sizeof(unsigned long))) - return 0; - - mfc_mem.roff = be32_to_cpu(prop[0]); - mfc_mem.rsize = be32_to_cpu(prop[1]); - - s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, - mfc_mem.loff, mfc_mem.lsize); - - return 1; -} diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 9a7073949d1d..a5ab712c1a59 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -1242,11 +1242,6 @@ static struct pwm_omap_dmtimer_pdata __maybe_unused pwm_dmtimer_pdata = { #if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE) static struct lirc_rx51_platform_data rx51_lirc_data = { .set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat, - .pwm_timer = 9, /* Use GPT 9 for CIR */ -#if IS_ENABLED(CONFIG_OMAP_DM_TIMER) - .dmtimer = &pwm_dmtimer_pdata, -#endif - }; static struct platform_device rx51_lirc_device = { diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index ab2b2b2b90e5..05e20aaf68dd 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -274,8 +274,6 @@ static struct platform_device omap3_rom_rng_device = { }, }; -static struct platform_device rx51_lirc_device; - static void __init nokia_n900_legacy_init(void) { hsmmc2_internal_input_clk(); @@ -294,10 +292,7 @@ static void __init nokia_n900_legacy_init(void) pr_info("RX-51: Registering OMAP3 HWRNG device\n"); platform_device_register(&omap3_rom_rng_device); - } - - platform_device_register(&rx51_lirc_device); } static void __init omap3_tao3530_legacy_init(void) @@ -492,10 +487,6 @@ static struct pwm_omap_dmtimer_pdata pwm_dmtimer_pdata = { static struct lirc_rx51_platform_data __maybe_unused rx51_lirc_data = { .set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat, - .pwm_timer = 9, /* Use GPT 9 for CIR */ -#if IS_ENABLED(CONFIG_OMAP_DM_TIMER) - .dmtimer = &pwm_dmtimer_pdata, -#endif }; static struct platform_device __maybe_unused rx51_lirc_device = { @@ -543,6 +534,7 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { &omap3_iommu_pdata), OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x4809c000, "4809c000.mmc", &mmc_pdata[0]), OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x480b4000, "480b4000.mmc", &mmc_pdata[1]), + OF_DEV_AUXDATA("nokia,n900-ir", 0, "n900-ir", &rx51_lirc_data), /* Only on am3517 */ OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0", diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile index edfff1ae1f8d..56d0eb6e254e 100644 --- a/arch/arm/mach-ux500/Makefile +++ b/arch/arm/mach-ux500/Makefile @@ -2,11 +2,9 @@ # Makefile for the linux kernel, U8500 machine. # -obj-y := cpu.o id.o pm.o -obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o +obj-y := pm.o obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o -obj-$(CONFIG_MACH_MOP500) += board-mop500-regulators.o \ - board-mop500-audio.o +obj-$(CONFIG_MACH_MOP500) += board-mop500-audio.o obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o diff --git a/arch/arm/mach-ux500/board-mop500-regulators.c b/arch/arm/mach-ux500/board-mop500-regulators.c deleted file mode 100644 index 32d744e91ec2..000000000000 --- a/arch/arm/mach-ux500/board-mop500-regulators.c +++ /dev/null @@ -1,1065 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * License Terms: GNU General Public License v2 - * - * Authors: Sundar Iyer <sundar.iyer@stericsson.com> - * Bengt Jonsson <bengt.g.jonsson@stericsson.com> - * Daniel Willerud <daniel.willerud@stericsson.com> - * - * MOP500 board specific initialization for regulators - */ -#include <linux/kernel.h> -#include <linux/regulator/machine.h> -#include <linux/regulator/ab8500.h> -#include "board-mop500-regulators.h" -#include "id.h" - -static struct regulator_consumer_supply gpio_en_3v3_consumers[] = { - REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), -}; - -struct regulator_init_data gpio_en_3v3_regulator = { - .constraints = { - .name = "EN-3V3", - .min_uV = 3300000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(gpio_en_3v3_consumers), - .consumer_supplies = gpio_en_3v3_consumers, -}; - -/* - * TPS61052 regulator - */ -static struct regulator_consumer_supply tps61052_vaudio_consumers[] = { - /* - * Boost converter supply to raise voltage on audio speaker, this - * is actually connected to three pins, VInVhfL (left amplifier) - * VInVhfR (right amplifier) and VIntDClassInt - all three must - * be connected to the same voltage. - */ - REGULATOR_SUPPLY("vintdclassint", "ab8500-codec.0"), -}; - -struct regulator_init_data tps61052_regulator = { - .constraints = { - .name = "vaudio-hf", - .min_uV = 4500000, - .max_uV = 4500000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(tps61052_vaudio_consumers), - .consumer_supplies = tps61052_vaudio_consumers, -}; - -static struct regulator_consumer_supply ab8500_vaux1_consumers[] = { - /* Main display, u8500 R3 uib */ - REGULATOR_SUPPLY("vddi", "mcde_disp_sony_acx424akp.0"), - /* Main display, u8500 uib and ST uib */ - REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.0"), - /* Secondary display, ST uib */ - REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.1"), - /* SFH7741 proximity sensor */ - REGULATOR_SUPPLY("vcc", "gpio-keys.0"), - /* BH1780GLS ambient light sensor */ - REGULATOR_SUPPLY("vcc", "2-0029"), - /* lsm303dlh accelerometer */ - REGULATOR_SUPPLY("vdd", "2-0018"), - /* lsm303dlhc accelerometer */ - REGULATOR_SUPPLY("vdd", "2-0019"), - /* lsm303dlh magnetometer */ - REGULATOR_SUPPLY("vdd", "2-001e"), - /* Rohm BU21013 Touchscreen devices */ - REGULATOR_SUPPLY("avdd", "3-005c"), - REGULATOR_SUPPLY("avdd", "3-005d"), - /* Synaptics RMI4 Touchscreen device */ - REGULATOR_SUPPLY("vdd", "3-004b"), - /* L3G4200D Gyroscope device */ - REGULATOR_SUPPLY("vdd", "2-0068"), - /* Ambient light sensor device */ - REGULATOR_SUPPLY("vdd", "3-0029"), - /* Pressure sensor device */ - REGULATOR_SUPPLY("vdd", "2-005c"), - /* Cypress TrueTouch Touchscreen device */ - REGULATOR_SUPPLY("vcpin", "spi8.0"), - /* Camera device */ - REGULATOR_SUPPLY("vaux12v5", "mmio_camera"), -}; - -static struct regulator_consumer_supply ab8500_vaux2_consumers[] = { - /* On-board eMMC power */ - REGULATOR_SUPPLY("vmmc", "sdi4"), - /* AB8500 audio codec */ - REGULATOR_SUPPLY("vcc-N2158", "ab8500-codec.0"), - /* AB8500 accessory detect 1 */ - REGULATOR_SUPPLY("vcc-N2158", "ab8500-acc-det.0"), - /* AB8500 Tv-out device */ - REGULATOR_SUPPLY("vcc-N2158", "mcde_tv_ab8500.4"), - /* AV8100 HDMI device */ - REGULATOR_SUPPLY("vcc-N2158", "av8100_hdmi.3"), -}; - -static struct regulator_consumer_supply ab8500_vaux3_consumers[] = { - REGULATOR_SUPPLY("v-SD-STM", "stm"), - /* External MMC slot power */ - REGULATOR_SUPPLY("vmmc", "sdi0"), -}; - -static struct regulator_consumer_supply ab8505_vaux4_consumers[] = { -}; - -static struct regulator_consumer_supply ab8505_vaux5_consumers[] = { -}; - -static struct regulator_consumer_supply ab8505_vaux6_consumers[] = { -}; - -static struct regulator_consumer_supply ab8505_vaux8_consumers[] = { - /* AB8500 audio codec device */ - REGULATOR_SUPPLY("v-aux8", NULL), -}; - -static struct regulator_consumer_supply ab8505_vadc_consumers[] = { - /* Internal general-purpose ADC */ - REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"), - /* ADC for charger */ - REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"), -}; - -static struct regulator_consumer_supply ab8500_vtvout_consumers[] = { - /* TV-out DENC supply */ - REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"), - /* Internal general-purpose ADC */ - REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"), - /* ADC for charger */ - REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"), - /* AB8500 Tv-out device */ - REGULATOR_SUPPLY("vtvout", "mcde_tv_ab8500.4"), -}; - -static struct regulator_consumer_supply ab8500_vaud_consumers[] = { - /* AB8500 audio-codec main supply */ - REGULATOR_SUPPLY("vaud", "ab8500-codec.0"), -}; - -static struct regulator_consumer_supply ab8500_vamic1_consumers[] = { - /* AB8500 audio-codec Mic1 supply */ - REGULATOR_SUPPLY("vamic1", "ab8500-codec.0"), -}; - -static struct regulator_consumer_supply ab8500_vamic2_consumers[] = { - /* AB8500 audio-codec Mic2 supply */ - REGULATOR_SUPPLY("vamic2", "ab8500-codec.0"), -}; - -static struct regulator_consumer_supply ab8500_vdmic_consumers[] = { - /* AB8500 audio-codec DMic supply */ - REGULATOR_SUPPLY("vdmic", "ab8500-codec.0"), -}; - -static struct regulator_consumer_supply ab8500_vintcore_consumers[] = { - /* SoC core supply, no device */ - REGULATOR_SUPPLY("v-intcore", NULL), - /* USB Transceiver */ - REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"), - /* Handled by abx500 clk driver */ - REGULATOR_SUPPLY("v-intcore", "abx500-clk.0"), -}; - -static struct regulator_consumer_supply ab8505_usb_consumers[] = { - /* HS USB OTG physical interface */ - REGULATOR_SUPPLY("v-ape", NULL), -}; - -static struct regulator_consumer_supply ab8500_vana_consumers[] = { - /* DB8500 DSI */ - REGULATOR_SUPPLY("vdddsi1v2", "mcde"), - REGULATOR_SUPPLY("vdddsi1v2", "b2r2_core"), - REGULATOR_SUPPLY("vdddsi1v2", "b2r2_1_core"), - REGULATOR_SUPPLY("vdddsi1v2", "dsilink.0"), - REGULATOR_SUPPLY("vdddsi1v2", "dsilink.1"), - REGULATOR_SUPPLY("vdddsi1v2", "dsilink.2"), - /* DB8500 CSI */ - REGULATOR_SUPPLY("vddcsi1v2", "mmio_camera"), -}; - -/* ab8500 regulator register initialization */ -static struct ab8500_regulator_reg_init ab8500_reg_init[] = { - /* - * VanaRequestCtrl = HP/LP depending on VxRequest - * VextSupply1RequestCtrl = HP/LP depending on VxRequest - */ - INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0xf0, 0x00), - /* - * VextSupply2RequestCtrl = HP/LP depending on VxRequest - * VextSupply3RequestCtrl = HP/LP depending on VxRequest - * Vaux1RequestCtrl = HP/LP depending on VxRequest - * Vaux2RequestCtrl = HP/LP depending on VxRequest - */ - INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0xff, 0x00), - /* - * Vaux3RequestCtrl = HP/LP depending on VxRequest - * SwHPReq = Control through SWValid disabled - */ - INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x07, 0x00), - /* - * VanaSysClkReq1HPValid = disabled - * Vaux1SysClkReq1HPValid = disabled - * Vaux2SysClkReq1HPValid = disabled - * Vaux3SysClkReq1HPValid = disabled - */ - INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00), - /* - * VextSupply1SysClkReq1HPValid = disabled - * VextSupply2SysClkReq1HPValid = disabled - * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled - */ - INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x70, 0x40), - /* - * VanaHwHPReq1Valid = disabled - * Vaux1HwHPreq1Valid = disabled - * Vaux2HwHPReq1Valid = disabled - * Vaux3HwHPReqValid = disabled - */ - INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0xe8, 0x00), - /* - * VextSupply1HwHPReq1Valid = disabled - * VextSupply2HwHPReq1Valid = disabled - * VextSupply3HwHPReq1Valid = disabled - */ - INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x07, 0x00), - /* - * VanaHwHPReq2Valid = disabled - * Vaux1HwHPReq2Valid = disabled - * Vaux2HwHPReq2Valid = disabled - * Vaux3HwHPReq2Valid = disabled - */ - INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0xe8, 0x00), - /* - * VextSupply1HwHPReq2Valid = disabled - * VextSupply2HwHPReq2Valid = disabled - * VextSupply3HwHPReq2Valid = HWReq2 controlled - */ - INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x07, 0x04), - /* - * VanaSwHPReqValid = disabled - * Vaux1SwHPReqValid = disabled - */ - INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0xa0, 0x00), - /* - * Vaux2SwHPReqValid = disabled - * Vaux3SwHPReqValid = disabled - * VextSupply1SwHPReqValid = disabled - * VextSupply2SwHPReqValid = disabled - * VextSupply3SwHPReqValid = disabled - */ - INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x1f, 0x00), - /* - * SysClkReq2Valid1 = SysClkReq2 controlled - * SysClkReq3Valid1 = disabled - * SysClkReq4Valid1 = SysClkReq4 controlled - * SysClkReq5Valid1 = disabled - * SysClkReq6Valid1 = SysClkReq6 controlled - * SysClkReq7Valid1 = disabled - * SysClkReq8Valid1 = disabled - */ - INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0xfe, 0x2a), - /* - * SysClkReq2Valid2 = disabled - * SysClkReq3Valid2 = disabled - * SysClkReq4Valid2 = disabled - * SysClkReq5Valid2 = disabled - * SysClkReq6Valid2 = SysClkReq6 controlled - * SysClkReq7Valid2 = disabled - * SysClkReq8Valid2 = disabled - */ - INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0xfe, 0x20), - /* - * VTVoutEna = disabled - * Vintcore12Ena = disabled - * Vintcore12Sel = 1.25 V - * Vintcore12LP = inactive (HP) - * VTVoutLP = inactive (HP) - */ - INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0xfe, 0x10), - /* - * VaudioEna = disabled - * VdmicEna = disabled - * Vamic1Ena = disabled - * Vamic2Ena = disabled - */ - INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x1e, 0x00), - /* - * Vamic1_dzout = high-Z when Vamic1 is disabled - * Vamic2_dzout = high-Z when Vamic2 is disabled - */ - INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x03, 0x00), - /* - * VPll = Hw controlled (NOTE! PRCMU bits) - * VanaRegu = force off - */ - INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x0f, 0x02), - /* - * VrefDDREna = disabled - * VrefDDRSleepMode = inactive (no pulldown) - */ - INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x03, 0x00), - /* - * VextSupply1Regu = force LP - * VextSupply2Regu = force OFF - * VextSupply3Regu = force HP (-> STBB2=LP and TPS=LP) - * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0 - * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0 - */ - INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0xff, 0x13), - /* - * Vaux1Regu = force HP - * Vaux2Regu = force off - */ - INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x0f, 0x01), - /* - * Vaux3Regu = force off - */ - INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x03, 0x00), - /* - * Vaux1Sel = 2.8 V - */ - INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x0f, 0x0C), - /* - * Vaux2Sel = 2.9 V - */ - INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0f, 0x0d), - /* - * Vaux3Sel = 2.91 V - */ - INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07, 0x07), - /* - * VextSupply12LP = disabled (no LP) - */ - INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x01, 0x00), - /* - * Vaux1Disch = short discharge time - * Vaux2Disch = short discharge time - * Vaux3Disch = short discharge time - * Vintcore12Disch = short discharge time - * VTVoutDisch = short discharge time - * VaudioDisch = short discharge time - */ - INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0xfc, 0x00), - /* - * VanaDisch = short discharge time - * VdmicPullDownEna = pulldown disabled when Vdmic is disabled - * VdmicDisch = short discharge time - */ - INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x16, 0x00), -}; - -/* AB8500 regulators */ -static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = { - /* supplies to the display/camera */ - [AB8500_LDO_AUX1] = { - .supply_regulator = "ab8500-ext-supply3", - .constraints = { - .name = "V-DISPLAY", - .min_uV = 2800000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - .boot_on = 1, /* display is on at boot */ - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers), - .consumer_supplies = ab8500_vaux1_consumers, - }, - /* supplies to the on-board eMMC */ - [AB8500_LDO_AUX2] = { - .supply_regulator = "ab8500-ext-supply3", - .constraints = { - .name = "V-eMMC1", - .min_uV = 1100000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_MODE, - .valid_modes_mask = REGULATOR_MODE_NORMAL | - REGULATOR_MODE_IDLE, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers), - .consumer_supplies = ab8500_vaux2_consumers, - }, - /* supply for VAUX3, supplies to SDcard slots */ - [AB8500_LDO_AUX3] = { - .supply_regulator = "ab8500-ext-supply3", - .constraints = { - .name = "V-MMC-SD", - .min_uV = 1100000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_MODE, - .valid_modes_mask = REGULATOR_MODE_NORMAL | - REGULATOR_MODE_IDLE, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers), - .consumer_supplies = ab8500_vaux3_consumers, - }, - /* supply for tvout, gpadc, TVOUT LDO */ - [AB8500_LDO_TVOUT] = { - .constraints = { - .name = "V-TVOUT", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vtvout_consumers), - .consumer_supplies = ab8500_vtvout_consumers, - }, - /* supply for ab8500-vaudio, VAUDIO LDO */ - [AB8500_LDO_AUDIO] = { - .constraints = { - .name = "V-AUD", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers), - .consumer_supplies = ab8500_vaud_consumers, - }, - /* supply for v-anamic1 VAMic1-LDO */ - [AB8500_LDO_ANAMIC1] = { - .constraints = { - .name = "V-AMIC1", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers), - .consumer_supplies = ab8500_vamic1_consumers, - }, - /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */ - [AB8500_LDO_ANAMIC2] = { - .constraints = { - .name = "V-AMIC2", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers), - .consumer_supplies = ab8500_vamic2_consumers, - }, - /* supply for v-dmic, VDMIC LDO */ - [AB8500_LDO_DMIC] = { - .constraints = { - .name = "V-DMIC", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vdmic_consumers), - .consumer_supplies = ab8500_vdmic_consumers, - }, - /* supply for v-intcore12, VINTCORE12 LDO */ - [AB8500_LDO_INTCORE] = { - .constraints = { - .name = "V-INTCORE", - .min_uV = 1250000, - .max_uV = 1350000, - .input_uV = 1800000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_MODE | - REGULATOR_CHANGE_DRMS, - .valid_modes_mask = REGULATOR_MODE_NORMAL | - REGULATOR_MODE_IDLE, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers), - .consumer_supplies = ab8500_vintcore_consumers, - }, - /* supply for U8500 CSI-DSI, VANA LDO */ - [AB8500_LDO_ANA] = { - .constraints = { - .name = "V-CSI-DSI", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers), - .consumer_supplies = ab8500_vana_consumers, - }, -}; - -/* supply for VextSupply3 */ -static struct regulator_consumer_supply ab8500_ext_supply3_consumers[] = { - /* SIM supply for 3 V SIM cards */ - REGULATOR_SUPPLY("vinvsim", "sim-detect.0"), -}; - -/* extended configuration for VextSupply2, only used for HREFP_V20 boards */ -static struct ab8500_ext_regulator_cfg ab8500_ext_supply2 = { - .hwreq = true, -}; - -/* - * AB8500 external regulators - */ -static struct regulator_init_data ab8500_ext_regulators[] = { - /* fixed Vbat supplies VSMPS1_EXT_1V8 */ - [AB8500_EXT_SUPPLY1] = { - .constraints = { - .name = "ab8500-ext-supply1", - .min_uV = 1800000, - .max_uV = 1800000, - .initial_mode = REGULATOR_MODE_IDLE, - .boot_on = 1, - .always_on = 1, - }, - }, - /* fixed Vbat supplies VSMPS2_EXT_1V36 and VSMPS5_EXT_1V15 */ - [AB8500_EXT_SUPPLY2] = { - .constraints = { - .name = "ab8500-ext-supply2", - .min_uV = 1360000, - .max_uV = 1360000, - }, - }, - /* fixed Vbat supplies VSMPS3_EXT_3V4 and VSMPS4_EXT_3V4 */ - [AB8500_EXT_SUPPLY3] = { - .constraints = { - .name = "ab8500-ext-supply3", - .min_uV = 3400000, - .max_uV = 3400000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .boot_on = 1, - }, - .num_consumer_supplies = - ARRAY_SIZE(ab8500_ext_supply3_consumers), - .consumer_supplies = ab8500_ext_supply3_consumers, - }, -}; - -/* ab8505 regulator register initialization */ -static struct ab8500_regulator_reg_init ab8505_reg_init[] = { - /* - * VarmRequestCtrl - * VsmpsCRequestCtrl - * VsmpsARequestCtrl - * VsmpsBRequestCtrl - */ - INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL1, 0x00, 0x00), - /* - * VsafeRequestCtrl - * VpllRequestCtrl - * VanaRequestCtrl = HP/LP depending on VxRequest - */ - INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL2, 0x30, 0x00), - /* - * Vaux1RequestCtrl = HP/LP depending on VxRequest - * Vaux2RequestCtrl = HP/LP depending on VxRequest - */ - INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL3, 0xf0, 0x00), - /* - * Vaux3RequestCtrl = HP/LP depending on VxRequest - * SwHPReq = Control through SWValid disabled - */ - INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL4, 0x07, 0x00), - /* - * VsmpsASysClkReq1HPValid - * VsmpsBSysClkReq1HPValid - * VsafeSysClkReq1HPValid - * VanaSysClkReq1HPValid = disabled - * VpllSysClkReq1HPValid - * Vaux1SysClkReq1HPValid = disabled - * Vaux2SysClkReq1HPValid = disabled - * Vaux3SysClkReq1HPValid = disabled - */ - INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00), - /* - * VsmpsCSysClkReq1HPValid - * VarmSysClkReq1HPValid - * VbbSysClkReq1HPValid - * VsmpsMSysClkReq1HPValid - */ - INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID2, 0x00, 0x00), - /* - * VsmpsAHwHPReq1Valid - * VsmpsBHwHPReq1Valid - * VsafeHwHPReq1Valid - * VanaHwHPReq1Valid = disabled - * VpllHwHPReq1Valid - * Vaux1HwHPreq1Valid = disabled - * Vaux2HwHPReq1Valid = disabled - * Vaux3HwHPReqValid = disabled - */ - INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID1, 0xe8, 0x00), - /* - * VsmpsMHwHPReq1Valid - */ - INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID2, 0x00, 0x00), - /* - * VsmpsAHwHPReq2Valid - * VsmpsBHwHPReq2Valid - * VsafeHwHPReq2Valid - * VanaHwHPReq2Valid = disabled - * VpllHwHPReq2Valid - * Vaux1HwHPReq2Valid = disabled - * Vaux2HwHPReq2Valid = disabled - * Vaux3HwHPReq2Valid = disabled - */ - INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID1, 0xe8, 0x00), - /* - * VsmpsMHwHPReq2Valid - */ - INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID2, 0x00, 0x00), - /** - * VsmpsCSwHPReqValid - * VarmSwHPReqValid - * VsmpsASwHPReqValid - * VsmpsBSwHPReqValid - * VsafeSwHPReqValid - * VanaSwHPReqValid - * VanaSwHPReqValid = disabled - * VpllSwHPReqValid - * Vaux1SwHPReqValid = disabled - */ - INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID1, 0xa0, 0x00), - /* - * Vaux2SwHPReqValid = disabled - * Vaux3SwHPReqValid = disabled - * VsmpsMSwHPReqValid - */ - INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID2, 0x03, 0x00), - /* - * SysClkReq2Valid1 = SysClkReq2 controlled - * SysClkReq3Valid1 = disabled - * SysClkReq4Valid1 = SysClkReq4 controlled - */ - INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID1, 0x0e, 0x0a), - /* - * SysClkReq2Valid2 = disabled - * SysClkReq3Valid2 = disabled - * SysClkReq4Valid2 = disabled - */ - INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID2, 0x0e, 0x00), - /* - * Vaux4SwHPReqValid - * Vaux4HwHPReq2Valid - * Vaux4HwHPReq1Valid - * Vaux4SysClkReq1HPValid - */ - INIT_REGULATOR_REGISTER(AB8505_REGUVAUX4REQVALID, 0x00, 0x00), - /* - * VadcEna = disabled - * VintCore12Ena = disabled - * VintCore12Sel = 1.25 V - * VintCore12LP = inactive (HP) - * VadcLP = inactive (HP) - */ - INIT_REGULATOR_REGISTER(AB8505_REGUMISC1, 0xfe, 0x10), - /* - * VaudioEna = disabled - * Vaux8Ena = disabled - * Vamic1Ena = disabled - * Vamic2Ena = disabled - */ - INIT_REGULATOR_REGISTER(AB8505_VAUDIOSUPPLY, 0x1e, 0x00), - /* - * Vamic1_dzout = high-Z when Vamic1 is disabled - * Vamic2_dzout = high-Z when Vamic2 is disabled - */ - INIT_REGULATOR_REGISTER(AB8505_REGUCTRL1VAMIC, 0x03, 0x00), - /* - * VsmpsARegu - * VsmpsASelCtrl - * VsmpsAAutoMode - * VsmpsAPWMMode - */ - INIT_REGULATOR_REGISTER(AB8505_VSMPSAREGU, 0x00, 0x00), - /* - * VsmpsBRegu - * VsmpsBSelCtrl - * VsmpsBAutoMode - * VsmpsBPWMMode - */ - INIT_REGULATOR_REGISTER(AB8505_VSMPSBREGU, 0x00, 0x00), - /* - * VsafeRegu - * VsafeSelCtrl - * VsafeAutoMode - * VsafePWMMode - */ - INIT_REGULATOR_REGISTER(AB8505_VSAFEREGU, 0x00, 0x00), - /* - * VPll = Hw controlled (NOTE! PRCMU bits) - * VanaRegu = force off - */ - INIT_REGULATOR_REGISTER(AB8505_VPLLVANAREGU, 0x0f, 0x02), - /* - * VextSupply1Regu = force OFF (OTP_ExtSupply12LPnPolarity 1) - * VextSupply2Regu = force OFF (OTP_ExtSupply12LPnPolarity 1) - * VextSupply3Regu = force OFF (OTP_ExtSupply3LPnPolarity 0) - * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0 - * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0 - */ - INIT_REGULATOR_REGISTER(AB8505_EXTSUPPLYREGU, 0xff, 0x30), - /* - * Vaux1Regu = force HP - * Vaux2Regu = force off - */ - INIT_REGULATOR_REGISTER(AB8505_VAUX12REGU, 0x0f, 0x01), - /* - * Vaux3Regu = force off - */ - INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3REGU, 0x03, 0x00), - /* - * VsmpsASel1 - */ - INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL1, 0x00, 0x00), - /* - * VsmpsASel2 - */ - INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL2, 0x00, 0x00), - /* - * VsmpsASel3 - */ - INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL3, 0x00, 0x00), - /* - * VsmpsBSel1 - */ - INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL1, 0x00, 0x00), - /* - * VsmpsBSel2 - */ - INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL2, 0x00, 0x00), - /* - * VsmpsBSel3 - */ - INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL3, 0x00, 0x00), - /* - * VsafeSel1 - */ - INIT_REGULATOR_REGISTER(AB8505_VSAFESEL1, 0x00, 0x00), - /* - * VsafeSel2 - */ - INIT_REGULATOR_REGISTER(AB8505_VSAFESEL2, 0x00, 0x00), - /* - * VsafeSel3 - */ - INIT_REGULATOR_REGISTER(AB8505_VSAFESEL3, 0x00, 0x00), - /* - * Vaux1Sel = 2.8 V - */ - INIT_REGULATOR_REGISTER(AB8505_VAUX1SEL, 0x0f, 0x0C), - /* - * Vaux2Sel = 2.9 V - */ - INIT_REGULATOR_REGISTER(AB8505_VAUX2SEL, 0x0f, 0x0d), - /* - * Vaux3Sel = 2.91 V - */ - INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3SEL, 0x07, 0x07), - /* - * Vaux4RequestCtrl - */ - INIT_REGULATOR_REGISTER(AB8505_VAUX4REQCTRL, 0x00, 0x00), - /* - * Vaux4Regu - */ - INIT_REGULATOR_REGISTER(AB8505_VAUX4REGU, 0x00, 0x00), - /* - * Vaux4Sel - */ - INIT_REGULATOR_REGISTER(AB8505_VAUX4SEL, 0x00, 0x00), - /* - * Vaux1Disch = short discharge time - * Vaux2Disch = short discharge time - * Vaux3Disch = short discharge time - * Vintcore12Disch = short discharge time - * VTVoutDisch = short discharge time - * VaudioDisch = short discharge time - */ - INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH, 0xfc, 0x00), - /* - * VanaDisch = short discharge time - * Vaux8PullDownEna = pulldown disabled when Vaux8 is disabled - * Vaux8Disch = short discharge time - */ - INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH2, 0x16, 0x00), - /* - * Vaux4Disch = short discharge time - */ - INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH3, 0x01, 0x00), - /* - * Vaux5Sel - * Vaux5LP - * Vaux5Ena - * Vaux5Disch - * Vaux5DisSfst - * Vaux5DisPulld - */ - INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX5, 0x00, 0x00), - /* - * Vaux6Sel - * Vaux6LP - * Vaux6Ena - * Vaux6DisPulld - */ - INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX6, 0x00, 0x00), -}; - -static struct regulator_init_data ab8505_regulators[AB8505_NUM_REGULATORS] = { - /* supplies to the display/camera */ - [AB8505_LDO_AUX1] = { - .constraints = { - .name = "V-DISPLAY", - .min_uV = 2800000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - .boot_on = 1, /* display is on at boot */ - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers), - .consumer_supplies = ab8500_vaux1_consumers, - }, - /* supplies to the on-board eMMC */ - [AB8505_LDO_AUX2] = { - .constraints = { - .name = "V-eMMC1", - .min_uV = 1100000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_MODE, - .valid_modes_mask = REGULATOR_MODE_NORMAL | - REGULATOR_MODE_IDLE, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers), - .consumer_supplies = ab8500_vaux2_consumers, - }, - /* supply for VAUX3, supplies to SDcard slots */ - [AB8505_LDO_AUX3] = { - .constraints = { - .name = "V-MMC-SD", - .min_uV = 1100000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_MODE, - .valid_modes_mask = REGULATOR_MODE_NORMAL | - REGULATOR_MODE_IDLE, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers), - .consumer_supplies = ab8500_vaux3_consumers, - }, - /* supply for VAUX4, supplies to NFC and standalone secure element */ - [AB8505_LDO_AUX4] = { - .constraints = { - .name = "V-NFC-SE", - .min_uV = 1100000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_MODE, - .valid_modes_mask = REGULATOR_MODE_NORMAL | - REGULATOR_MODE_IDLE, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux4_consumers), - .consumer_supplies = ab8505_vaux4_consumers, - }, - /* supply for VAUX5, supplies to TBD */ - [AB8505_LDO_AUX5] = { - .constraints = { - .name = "V-AUX5", - .min_uV = 1050000, - .max_uV = 2790000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_MODE, - .valid_modes_mask = REGULATOR_MODE_NORMAL | - REGULATOR_MODE_IDLE, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux5_consumers), - .consumer_supplies = ab8505_vaux5_consumers, - }, - /* supply for VAUX6, supplies to TBD */ - [AB8505_LDO_AUX6] = { - .constraints = { - .name = "V-AUX6", - .min_uV = 1050000, - .max_uV = 2790000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_MODE, - .valid_modes_mask = REGULATOR_MODE_NORMAL | - REGULATOR_MODE_IDLE, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux6_consumers), - .consumer_supplies = ab8505_vaux6_consumers, - }, - /* supply for gpadc, ADC LDO */ - [AB8505_LDO_ADC] = { - .constraints = { - .name = "V-ADC", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8505_vadc_consumers), - .consumer_supplies = ab8505_vadc_consumers, - }, - /* supply for ab8500-vaudio, VAUDIO LDO */ - [AB8505_LDO_AUDIO] = { - .constraints = { - .name = "V-AUD", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers), - .consumer_supplies = ab8500_vaud_consumers, - }, - /* supply for v-anamic1 VAMic1-LDO */ - [AB8505_LDO_ANAMIC1] = { - .constraints = { - .name = "V-AMIC1", - .valid_ops_mask = REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_MODE, - .valid_modes_mask = REGULATOR_MODE_NORMAL | - REGULATOR_MODE_IDLE, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers), - .consumer_supplies = ab8500_vamic1_consumers, - }, - /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */ - [AB8505_LDO_ANAMIC2] = { - .constraints = { - .name = "V-AMIC2", - .valid_ops_mask = REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_MODE, - .valid_modes_mask = REGULATOR_MODE_NORMAL | - REGULATOR_MODE_IDLE, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers), - .consumer_supplies = ab8500_vamic2_consumers, - }, - /* supply for v-aux8, VAUX8 LDO */ - [AB8505_LDO_AUX8] = { - .constraints = { - .name = "V-AUX8", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux8_consumers), - .consumer_supplies = ab8505_vaux8_consumers, - }, - /* supply for v-intcore12, VINTCORE12 LDO */ - [AB8505_LDO_INTCORE] = { - .constraints = { - .name = "V-INTCORE", - .min_uV = 1250000, - .max_uV = 1350000, - .input_uV = 1800000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_MODE | - REGULATOR_CHANGE_DRMS, - .valid_modes_mask = REGULATOR_MODE_NORMAL | - REGULATOR_MODE_IDLE, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers), - .consumer_supplies = ab8500_vintcore_consumers, - }, - /* supply for LDO USB */ - [AB8505_LDO_USB] = { - .constraints = { - .name = "V-USB", - .valid_ops_mask = REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_MODE, - .valid_modes_mask = REGULATOR_MODE_NORMAL | - REGULATOR_MODE_IDLE, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8505_usb_consumers), - .consumer_supplies = ab8505_usb_consumers, - }, - /* supply for U8500 CSI-DSI, VANA LDO */ - [AB8505_LDO_ANA] = { - .constraints = { - .name = "V-CSI-DSI", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers), - .consumer_supplies = ab8500_vana_consumers, - }, -}; - -struct ab8500_regulator_platform_data ab8500_regulator_plat_data = { - .reg_init = ab8500_reg_init, - .num_reg_init = ARRAY_SIZE(ab8500_reg_init), - .regulator = ab8500_regulators, - .num_regulator = ARRAY_SIZE(ab8500_regulators), - .ext_regulator = ab8500_ext_regulators, - .num_ext_regulator = ARRAY_SIZE(ab8500_ext_regulators), -}; - -struct ab8500_regulator_platform_data ab8505_regulator_plat_data = { - .reg_init = ab8505_reg_init, - .num_reg_init = ARRAY_SIZE(ab8505_reg_init), - .regulator = ab8505_regulators, - .num_regulator = ARRAY_SIZE(ab8505_regulators), -}; - -static void ab8500_modify_reg_init(int id, u8 mask, u8 value) -{ - int i; - - if (cpu_is_u8520()) { - for (i = ARRAY_SIZE(ab8505_reg_init) - 1; i >= 0; i--) { - if (ab8505_reg_init[i].id == id) { - u8 initval = ab8505_reg_init[i].value; - initval = (initval & ~mask) | (value & mask); - ab8505_reg_init[i].value = initval; - - BUG_ON(mask & ~ab8505_reg_init[i].mask); - return; - } - } - } else { - for (i = ARRAY_SIZE(ab8500_reg_init) - 1; i >= 0; i--) { - if (ab8500_reg_init[i].id == id) { - u8 initval = ab8500_reg_init[i].value; - initval = (initval & ~mask) | (value & mask); - ab8500_reg_init[i].value = initval; - - BUG_ON(mask & ~ab8500_reg_init[i].mask); - return; - } - } - } - - BUG_ON(1); -} - -void mop500_regulator_init(void) -{ - struct regulator_init_data *regulator; - - /* - * Temporarily turn on Vaux2 on 8520 machine - */ - if (cpu_is_u8520()) { - /* Vaux2 initialized to be on */ - ab8500_modify_reg_init(AB8505_VAUX12REGU, 0x0f, 0x05); - } - - /* - * Handle AB8500_EXT_SUPPLY2 on HREFP_V20_V50 boards (do it for - * all HREFP_V20 boards) - */ - if (cpu_is_u8500v20()) { - /* VextSupply2RequestCtrl = HP/OFF depending on VxRequest */ - ab8500_modify_reg_init(AB8500_REGUREQUESTCTRL3, 0x01, 0x01); - - /* VextSupply2SysClkReq1HPValid = SysClkReq1 controlled */ - ab8500_modify_reg_init(AB8500_REGUSYSCLKREQ1HPVALID2, - 0x20, 0x20); - - /* VextSupply2 = force HP at initialization */ - ab8500_modify_reg_init(AB8500_EXTSUPPLYREGU, 0x0c, 0x04); - - /* enable VextSupply2 during platform active */ - regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2]; - regulator->constraints.always_on = 1; - - /* disable VextSupply2 in suspend */ - regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2]; - regulator->constraints.state_mem.disabled = 1; - regulator->constraints.state_standby.disabled = 1; - - /* enable VextSupply2 HW control (used in suspend) */ - regulator->driver_data = (void *)&ab8500_ext_supply2; - } -} diff --git a/arch/arm/mach-ux500/board-mop500-regulators.h b/arch/arm/mach-ux500/board-mop500-regulators.h deleted file mode 100644 index 9bece38fe933..000000000000 --- a/arch/arm/mach-ux500/board-mop500-regulators.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * License Terms: GNU General Public License v2 - * - * Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson - * - * MOP500 board specific initialization for regulators - */ - -#ifndef __BOARD_MOP500_REGULATORS_H -#define __BOARD_MOP500_REGULATORS_H - -#include <linux/regulator/machine.h> -#include <linux/regulator/ab8500.h> - -extern struct ab8500_regulator_platform_data ab8500_regulator_plat_data; -extern struct ab8500_regulator_platform_data ab8505_regulator_plat_data; -extern struct regulator_init_data tps61052_regulator; -extern struct regulator_init_data gpio_en_3v3_regulator; - -void mop500_regulator_init(void); - -#endif diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c deleted file mode 100644 index 780bd13cd7e3..000000000000 --- a/arch/arm/mach-ux500/cache-l2x0.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2011 - * - * License terms: GNU General Public License (GPL) version 2 - */ - -#include <linux/io.h> -#include <linux/of.h> -#include <linux/of_address.h> - -#include <asm/outercache.h> -#include <asm/hardware/cache-l2x0.h> - -#include "db8500-regs.h" -#include "id.h" - -static int __init ux500_l2x0_unlock(void) -{ - int i; - struct device_node *np; - void __iomem *l2x0_base; - - np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache"); - l2x0_base = of_iomap(np, 0); - of_node_put(np); - if (!l2x0_base) - return -ENODEV; - - /* - * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions - * apparently locks both caches before jumping to the kernel. The - * l2x0 core will not touch the unlock registers if the l2x0 is - * already enabled, so we do it right here instead. The PL310 has - * 8 sets of registers, one per possible CPU. - */ - for (i = 0; i < 8; i++) { - writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE + - i * L2X0_LOCKDOWN_STRIDE); - writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE + - i * L2X0_LOCKDOWN_STRIDE); - } - iounmap(l2x0_base); - return 0; -} - -static void ux500_l2c310_write_sec(unsigned long val, unsigned reg) -{ - /* - * We can't write to secure registers as we are in non-secure - * mode, until we have some SMI service available. - */ -} - -static int __init ux500_l2x0_init(void) -{ - /* Multiplatform guard */ - if (!((cpu_is_u8500_family() || cpu_is_ux540_family()))) - return -ENODEV; - - /* Unlock before init */ - ux500_l2x0_unlock(); - outer_cache.write_sec = ux500_l2c310_write_sec; - l2x0_of_init(0, ~0); - - return 0; -} -early_initcall(ux500_l2x0_init); diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index a557955472ea..46b1da1bf5d2 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -12,41 +12,107 @@ #include <linux/init.h> #include <linux/device.h> #include <linux/amba/bus.h> +#include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/irqchip.h> +#include <linux/irqchip/arm-gic.h> +#include <linux/mfd/dbx500-prcmu.h> +#include <linux/platform_data/arm-ux500-pm.h> #include <linux/platform_device.h> #include <linux/io.h> -#include <linux/mfd/abx500/ab8500.h> -#include <linux/mfd/dbx500-prcmu.h> #include <linux/of.h> +#include <linux/of_address.h> #include <linux/of_platform.h> #include <linux/perf/arm_pmu.h> #include <linux/regulator/machine.h> -#include <linux/random.h> +#include <asm/outercache.h> +#include <asm/hardware/cache-l2x0.h> #include <asm/mach/map.h> +#include <asm/mach/arch.h> #include "setup.h" -#include "board-mop500-regulators.h" #include "board-mop500.h" #include "db8500-regs.h" -#include "id.h" -static struct ab8500_platform_data ab8500_platdata = { - .regulator = &ab8500_regulator_plat_data, -}; +static int __init ux500_l2x0_unlock(void) +{ + int i; + struct device_node *np; + void __iomem *l2x0_base; -static struct prcmu_pdata db8500_prcmu_pdata = { - .ab_platdata = &ab8500_platdata, - .version_offset = DB8500_PRCMU_FW_VERSION_OFFSET, - .legacy_offset = DB8500_PRCMU_LEGACY_OFFSET, -}; + np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache"); + l2x0_base = of_iomap(np, 0); + of_node_put(np); + if (!l2x0_base) + return -ENODEV; + + /* + * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions + * apparently locks both caches before jumping to the kernel. The + * l2x0 core will not touch the unlock registers if the l2x0 is + * already enabled, so we do it right here instead. The PL310 has + * 8 sets of registers, one per possible CPU. + */ + for (i = 0; i < 8; i++) { + writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE + + i * L2X0_LOCKDOWN_STRIDE); + writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE + + i * L2X0_LOCKDOWN_STRIDE); + } + iounmap(l2x0_base); + return 0; +} + +static void ux500_l2c310_write_sec(unsigned long val, unsigned reg) +{ + /* + * We can't write to secure registers as we are in non-secure + * mode, until we have some SMI service available. + */ +} -static void __init u8500_map_io(void) +/* + * FIXME: Should we set up the GPIO domain here? + * + * The problem is that we cannot put the interrupt resources into the platform + * device until the irqdomain has been added. Right now, we set the GIC interrupt + * domain from init_irq(), then load the gpio driver from + * core_initcall(nmk_gpio_init) and add the platform devices from + * arch_initcall(customize_machine). + * + * This feels fragile because it depends on the gpio device getting probed + * _before_ any device uses the gpio interrupts. +*/ +static void __init ux500_init_irq(void) +{ + struct device_node *np; + struct resource r; + + irqchip_init(); + np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu"); + of_address_to_resource(np, 0, &r); + of_node_put(np); + if (!r.start) { + pr_err("could not find PRCMU base resource\n"); + return; + } + prcmu_early_init(r.start, r.end-r.start); + ux500_pm_init(r.start, r.end-r.start); + + /* Unlock before init */ + ux500_l2x0_unlock(); + outer_cache.write_sec = ux500_l2c310_write_sec; +} + +static void ux500_restart(enum reboot_mode mode, const char *cmd) { - debug_ll_io_init(); - ux500_setup_id(); + local_irq_disable(); + local_fiq_disable(); + + prcmu_system_reset(0); } /* @@ -73,31 +139,6 @@ static struct arm_pmu_platdata db8500_pmu_platdata = { .handle_irq = db8500_pmu_handler, }; -static const char *db8500_read_soc_id(void) -{ - void __iomem *uid; - const char *retstr; - - uid = ioremap(U8500_BB_UID_BASE, 0x20); - if (!uid) - return NULL; - /* Throw these device-specific numbers into the entropy pool */ - add_device_randomness(uid, 0x14); - retstr = kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x", - readl((u32 *)uid+0), - readl((u32 *)uid+1), readl((u32 *)uid+2), - readl((u32 *)uid+3), readl((u32 *)uid+4)); - iounmap(uid); - return retstr; -} - -static struct device * __init db8500_soc_device_init(void) -{ - const char *soc_id = db8500_read_soc_id(); - - return ux500_soc_device_init(soc_id); -} - static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { /* Requires call-back bindings. */ OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), @@ -111,8 +152,7 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000, "ux500-msp-i2s.3", &msp3_platform_data), /* Requires non-DT:able platform data. */ - OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", - &db8500_prcmu_pdata), + OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL), OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL), OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL), OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0", @@ -121,8 +161,7 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { }; static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = { - OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", - &db8500_prcmu_pdata), + OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL), {}, }; @@ -136,15 +175,13 @@ static const struct of_device_id u8500_local_bus_nodes[] = { static void __init u8500_init_machine(void) { - struct device *parent = db8500_soc_device_init(); - /* automatically probe child nodes of dbx5x0 devices */ if (of_machine_is_compatible("st-ericsson,u8540")) of_platform_populate(NULL, u8500_local_bus_nodes, - u8540_auxdata_lookup, parent); + u8540_auxdata_lookup, NULL); else of_platform_populate(NULL, u8500_local_bus_nodes, - u8500_auxdata_lookup, parent); + u8500_auxdata_lookup, NULL); } static const char * stericsson_dt_platform_compat[] = { @@ -156,10 +193,10 @@ static const char * stericsson_dt_platform_compat[] = { }; DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)") - .map_io = u8500_map_io, + .l2c_aux_val = 0, + .l2c_aux_mask = ~0, .init_irq = ux500_init_irq, .init_machine = u8500_init_machine, - .init_late = NULL, .dt_compat = stericsson_dt_platform_compat, .restart = ux500_restart, MACHINE_END diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c deleted file mode 100644 index 82156cbc22ce..000000000000 --- a/arch/arm/mach-ux500/cpu.c +++ /dev/null @@ -1,148 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson - * Author: Lee Jones <lee.jones@linaro.org> for ST-Ericsson - * License terms: GNU General Public License (GPL) version 2 - */ - -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/mfd/dbx500-prcmu.h> -#include <linux/sys_soc.h> -#include <linux/err.h> -#include <linux/slab.h> -#include <linux/stat.h> -#include <linux/of.h> -#include <linux/of_irq.h> -#include <linux/of_address.h> -#include <linux/irq.h> -#include <linux/irqchip.h> -#include <linux/irqchip/arm-gic.h> -#include <linux/platform_data/clk-ux500.h> -#include <linux/platform_data/arm-ux500-pm.h> - -#include <asm/mach/map.h> - -#include "setup.h" - -#include "board-mop500.h" -#include "db8500-regs.h" -#include "id.h" - -void ux500_restart(enum reboot_mode mode, const char *cmd) -{ - local_irq_disable(); - local_fiq_disable(); - - prcmu_system_reset(0); -} - -/* - * FIXME: Should we set up the GPIO domain here? - * - * The problem is that we cannot put the interrupt resources into the platform - * device until the irqdomain has been added. Right now, we set the GIC interrupt - * domain from init_irq(), then load the gpio driver from - * core_initcall(nmk_gpio_init) and add the platform devices from - * arch_initcall(customize_machine). - * - * This feels fragile because it depends on the gpio device getting probed - * _before_ any device uses the gpio interrupts. -*/ -void __init ux500_init_irq(void) -{ - struct device_node *np; - struct resource r; - - irqchip_init(); - np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu"); - of_address_to_resource(np, 0, &r); - of_node_put(np); - if (!r.start) { - pr_err("could not find PRCMU base resource\n"); - return; - } - prcmu_early_init(r.start, r.end-r.start); - ux500_pm_init(r.start, r.end-r.start); - - /* - * Init clocks here so that they are available for system timer - * initialization. - */ - if (cpu_is_u8500_family()) - u8500_clk_init(); - else if (cpu_is_u9540()) - u9540_clk_init(); - else if (cpu_is_u8540()) - u8540_clk_init(); -} - -static const char * __init ux500_get_machine(void) -{ - return kasprintf(GFP_KERNEL, "DB%4x", dbx500_partnumber()); -} - -static const char * __init ux500_get_family(void) -{ - return kasprintf(GFP_KERNEL, "ux500"); -} - -static const char * __init ux500_get_revision(void) -{ - unsigned int rev = dbx500_revision(); - - if (rev == 0x01) - return kasprintf(GFP_KERNEL, "%s", "ED"); - else if (rev >= 0xA0) - return kasprintf(GFP_KERNEL, "%d.%d", - (rev >> 4) - 0xA + 1, rev & 0xf); - - return kasprintf(GFP_KERNEL, "%s", "Unknown"); -} - -static ssize_t ux500_get_process(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - if (dbx500_id.process == 0x00) - return sprintf(buf, "Standard\n"); - - return sprintf(buf, "%02xnm\n", dbx500_id.process); -} - -static void __init soc_info_populate(struct soc_device_attribute *soc_dev_attr, - const char *soc_id) -{ - soc_dev_attr->soc_id = soc_id; - soc_dev_attr->machine = ux500_get_machine(); - soc_dev_attr->family = ux500_get_family(); - soc_dev_attr->revision = ux500_get_revision(); -} - -static const struct device_attribute ux500_soc_attr = - __ATTR(process, S_IRUGO, ux500_get_process, NULL); - -struct device * __init ux500_soc_device_init(const char *soc_id) -{ - struct device *parent; - struct soc_device *soc_dev; - struct soc_device_attribute *soc_dev_attr; - - soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); - if (!soc_dev_attr) - return ERR_PTR(-ENOMEM); - - soc_info_populate(soc_dev_attr, soc_id); - - soc_dev = soc_device_register(soc_dev_attr); - if (IS_ERR(soc_dev)) { - kfree(soc_dev_attr); - return NULL; - } - - parent = soc_device_to_device(soc_dev); - device_create_file(parent, &ux500_soc_attr); - - return parent; -} diff --git a/arch/arm/mach-ux500/id.c b/arch/arm/mach-ux500/id.c deleted file mode 100644 index 1e81e990044b..000000000000 --- a/arch/arm/mach-ux500/id.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson - * License terms: GNU General Public License (GPL) version 2 - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/io.h> - -#include <asm/cputype.h> -#include <asm/tlbflush.h> -#include <asm/cacheflush.h> -#include <asm/mach/map.h> - -#include "setup.h" - -#include "db8500-regs.h" -#include "id.h" - -struct dbx500_asic_id dbx500_id; - -static unsigned int __init ux500_read_asicid(phys_addr_t addr) -{ - phys_addr_t base = addr & ~0xfff; - struct map_desc desc = { - .virtual = (unsigned long)UX500_VIRT_ROM, - .pfn = __phys_to_pfn(base), - .length = SZ_16K, - .type = MT_DEVICE, - }; - - iotable_init(&desc, 1); - - /* As in devicemaps_init() */ - local_flush_tlb_all(); - flush_cache_all(); - - return readl(UX500_VIRT_ROM + (addr & 0xfff)); -} - -static void ux500_print_soc_info(unsigned int asicid) -{ - unsigned int rev = dbx500_revision(); - - pr_info("DB%4x ", dbx500_partnumber()); - - if (rev == 0x01) - pr_cont("Early Drop"); - else if (rev >= 0xA0) - pr_cont("v%d.%d" , (rev >> 4) - 0xA + 1, rev & 0xf); - else - pr_cont("Unknown"); - - pr_cont(" [%#010x]\n", asicid); -} - -static unsigned int partnumber(unsigned int asicid) -{ - return (asicid >> 8) & 0xffff; -} - -/* - * SOC MIDR ASICID ADDRESS ASICID VALUE - * DB8500ed 0x410fc090 0x9001FFF4 0x00850001 - * DB8500v1 0x411fc091 0x9001FFF4 0x008500A0 - * DB8500v1.1 0x411fc091 0x9001FFF4 0x008500A1 - * DB8500v2 0x412fc091 0x9001DBF4 0x008500B0 - * DB8520v2.2 0x412fc091 0x9001DBF4 0x008500B2 - * DB5500v1 0x412fc091 0x9001FFF4 0x005500A0 - * DB9540 0x413fc090 0xFFFFDBF4 0x009540xx - */ - -void __init ux500_setup_id(void) -{ - unsigned int cpuid = read_cpuid_id(); - unsigned int asicid = 0; - phys_addr_t addr = 0; - - switch (cpuid) { - case 0x410fc090: /* DB8500ed */ - case 0x411fc091: /* DB8500v1 */ - addr = 0x9001FFF4; - break; - - case 0x412fc091: /* DB8520 / DB8500v2 / DB5500v1 */ - asicid = ux500_read_asicid(0x9001DBF4); - if (partnumber(asicid) == 0x8500 || - partnumber(asicid) == 0x8520) - /* DB8500v2 */ - break; - - /* DB5500v1 */ - addr = 0x9001FFF4; - break; - - case 0x413fc090: /* DB9540 */ - addr = 0xFFFFDBF4; - break; - } - - if (addr) - asicid = ux500_read_asicid(addr); - - if (!asicid) { - pr_err("Unable to identify SoC\n"); - ux500_unknown_soc(); - } - - dbx500_id.process = asicid >> 24; - dbx500_id.partnumber = partnumber(asicid); - dbx500_id.revision = asicid & 0xff; - - ux500_print_soc_info(asicid); -} diff --git a/arch/arm/mach-ux500/id.h b/arch/arm/mach-ux500/id.h deleted file mode 100644 index bcc58a8cccbc..000000000000 --- a/arch/arm/mach-ux500/id.h +++ /dev/null @@ -1,144 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson - * License terms: GNU General Public License (GPL) version 2 - */ - -#ifndef __MACH_UX500_ID -#define __MACH_UX500_ID - -/** - * struct dbx500_asic_id - fields of the ASIC ID - * @process: the manufacturing process, 0x40 is 40 nm 0x00 is "standard" - * @partnumber: hithereto 0x8500 for DB8500 - * @revision: version code in the series - */ -struct dbx500_asic_id { - u16 partnumber; - u8 revision; - u8 process; -}; - -extern struct dbx500_asic_id dbx500_id; - -static inline unsigned int __attribute_const__ dbx500_partnumber(void) -{ - return dbx500_id.partnumber; -} - -static inline unsigned int __attribute_const__ dbx500_revision(void) -{ - return dbx500_id.revision; -} - -/* - * SOCs - */ - -static inline bool __attribute_const__ cpu_is_u8500(void) -{ - return dbx500_partnumber() == 0x8500; -} - -static inline bool __attribute_const__ cpu_is_u8520(void) -{ - return dbx500_partnumber() == 0x8520; -} - -static inline bool cpu_is_u8500_family(void) -{ - return cpu_is_u8500() || cpu_is_u8520(); -} - -static inline bool __attribute_const__ cpu_is_u9540(void) -{ - return dbx500_partnumber() == 0x9540; -} - -static inline bool __attribute_const__ cpu_is_u8540(void) -{ - return dbx500_partnumber() == 0x8540; -} - -static inline bool __attribute_const__ cpu_is_u8580(void) -{ - return dbx500_partnumber() == 0x8580; -} - -static inline bool cpu_is_ux540_family(void) -{ - return cpu_is_u9540() || cpu_is_u8540() || cpu_is_u8580(); -} - -/* - * 8500 revisions - */ - -static inline bool __attribute_const__ cpu_is_u8500ed(void) -{ - return cpu_is_u8500() && dbx500_revision() == 0x00; -} - -static inline bool __attribute_const__ cpu_is_u8500v1(void) -{ - return cpu_is_u8500() && (dbx500_revision() & 0xf0) == 0xA0; -} - -static inline bool __attribute_const__ cpu_is_u8500v10(void) -{ - return cpu_is_u8500() && dbx500_revision() == 0xA0; -} - -static inline bool __attribute_const__ cpu_is_u8500v11(void) -{ - return cpu_is_u8500() && dbx500_revision() == 0xA1; -} - -static inline bool __attribute_const__ cpu_is_u8500v2(void) -{ - return cpu_is_u8500() && ((dbx500_revision() & 0xf0) == 0xB0); -} - -static inline bool cpu_is_u8500v20(void) -{ - return cpu_is_u8500() && (dbx500_revision() == 0xB0); -} - -static inline bool cpu_is_u8500v21(void) -{ - return cpu_is_u8500() && (dbx500_revision() == 0xB1); -} - -static inline bool cpu_is_u8500v22(void) -{ - return cpu_is_u8500() && (dbx500_revision() == 0xB2); -} - -static inline bool cpu_is_u8500v20_or_later(void) -{ - return (cpu_is_u8500() && !cpu_is_u8500v10() && !cpu_is_u8500v11()); -} - -/* - * 8540 revisions - */ - -static inline bool __attribute_const__ cpu_is_u8540v10(void) -{ - return cpu_is_u8540() && dbx500_revision() == 0xA0; -} - -static inline bool __attribute_const__ cpu_is_u8580v10(void) -{ - return cpu_is_u8580() && dbx500_revision() == 0xA0; -} - -static inline bool ux500_is_svp(void) -{ - return false; -} - -#define ux500_unknown_soc() BUG() - -#endif diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index 88b8ab4f300c..8f2f615ff958 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -26,7 +26,6 @@ #include "setup.h" #include "db8500-regs.h" -#include "id.h" /* Magic triggers in backup RAM */ #define UX500_CPU1_JUMPADDR_OFFSET 0x1FF4 diff --git a/arch/arm/mach-ux500/setup.h b/arch/arm/mach-ux500/setup.h index c704254ab67c..988e7c77068d 100644 --- a/arch/arm/mach-ux500/setup.h +++ b/arch/arm/mach-ux500/setup.h @@ -11,18 +11,6 @@ #ifndef __ASM_ARCH_SETUP_H #define __ASM_ARCH_SETUP_H -#include <asm/mach/arch.h> -#include <linux/init.h> -#include <linux/mfd/abx500/ab8500.h> - -void ux500_restart(enum reboot_mode mode, const char *cmd); - -void __init ux500_setup_id(void); - -extern void __init ux500_init_irq(void); - -extern struct device *ux500_soc_device_init(const char *soc_id); - extern void ux500_cpu_die(unsigned int cpu); #endif /* __ASM_ARCH_SETUP_H */ diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 189d21541f9c..c19b82799a34 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -5,6 +5,7 @@ */ #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/reset/hisi,hi6220-resets.h> #include <dt-bindings/clock/hi6220-clock.h> #include <dt-bindings/pinctrl/hisi.h> #include <dt-bindings/thermal/thermal.h> @@ -252,6 +253,7 @@ compatible = "hisilicon,hi6220-mediactrl", "syscon"; reg = <0x0 0xf4410000 0x0 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; }; pm_ctrl: pm_ctrl@f7032000 { |