diff options
| author |   Christophe Leroy <christophe.leroy@c-s.fr> | 2019-08-29 08:45:12 +0000 |
|---|---|---|
| committer |   Michael Ellerman <mpe@ellerman.id.au> | 2019-11-18 22:27:52 +1100 |
| commit | 44448640dd0df98891c5ea4695d89a4972cb4c1f (patch) | |
| tree | be89ec9eb0c80cc98192367803d23b499c315916 /arch | |
| parent | powerpc/reg: use ASM_FTR_IFSET() instead of opencoding fixup. (diff) | |
| download | linux-dev-44448640dd0df98891c5ea4695d89a4972cb4c1f.tar.xz linux-dev-44448640dd0df98891c5ea4695d89a4972cb4c1f.zip | |
powerpc: permanently include 8xx registers in reg.h
Most 8xx registers have specific names, so just include
reg_8xx.h all the time in reg.h in order to have them defined
even when CONFIG_PPC_8xx is not selected. This will avoid
the need for #ifdefs in C code.
Guard SPRN_ICTRL in an #ifdef CONFIG_PPC_8xx as this register
has same name but different meaning and different spr number as
another register in the mpc7450.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/dd82934ad91aab607d0eb7e626c14e6ac0d654eb.1567068137.git.christophe.leroy@c-s.fr
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/include/asm/nohash/32/kup-8xx.h | 1 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/reg.h | 2 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/reg_8xx.h | 4 |
3 files changed, 3 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/nohash/32/kup-8xx.h b/arch/powerpc/include/asm/nohash/32/kup-8xx.h index 1c3133b5f86a..1006a427e99c 100644 --- a/arch/powerpc/include/asm/nohash/32/kup-8xx.h +++ b/arch/powerpc/include/asm/nohash/32/kup-8xx.h @@ -3,6 +3,7 @@ #define _ASM_POWERPC_KUP_8XX_H_ #include <asm/bug.h> +#include <asm/mmu.h> #ifdef CONFIG_PPC_KUAP diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index f3f368819f9c..b7faf6c781a7 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -25,9 +25,7 @@ #include <asm/reg_fsl_emb.h> #endif -#ifdef CONFIG_PPC_8xx #include <asm/reg_8xx.h> -#endif /* CONFIG_PPC_8xx */ #define MSR_SF_LG 63 /* Enable 64 bit mode */ #define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */ diff --git a/arch/powerpc/include/asm/reg_8xx.h b/arch/powerpc/include/asm/reg_8xx.h index 7192eece6c3e..07df35ee8cbc 100644 --- a/arch/powerpc/include/asm/reg_8xx.h +++ b/arch/powerpc/include/asm/reg_8xx.h @@ -5,8 +5,6 @@ #ifndef _ASM_POWERPC_REG_8xx_H #define _ASM_POWERPC_REG_8xx_H -#include <asm/mmu.h> - /* Cache control on the MPC8xx is provided through some additional * special purpose registers. */ @@ -38,7 +36,9 @@ #define SPRN_CMPF 153 #define SPRN_LCTRL1 156 #define SPRN_LCTRL2 157 +#ifdef CONFIG_PPC_8xx #define SPRN_ICTRL 158 +#endif #define SPRN_BAR 159 /* Commands. Only the first few are available to the instruction cache. |