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| author |   Shaokun Zhang <zhangshaokun@hisilicon.com> | 2019-10-25 14:32:06 +0800 |
|---|---|---|
| committer |   Catalin Marinas <catalin.marinas@arm.com> | 2019-10-25 16:19:44 +0100 |
| commit | 7db3e57e6a95435cef5b33f2a90efcac5ce577da (patch) | |
| tree | f7c5693579ad9e41f305ea6b11391f351b5e7be2 /arch | |
| parent | arm64/mm: Poison initmem while freeing with free_reserved_area() (diff) | |
| download | linux-dev-7db3e57e6a95435cef5b33f2a90efcac5ce577da.tar.xz linux-dev-7db3e57e6a95435cef5b33f2a90efcac5ce577da.zip | |
arm64: cpufeature: Fix typos in comment
Fix up one typos: CTR_E0 -> CTR_EL0
Cc: Will Deacon <will@kernel.org>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/kernel/cpuinfo.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index 05933c065732..56bba746da1c 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -329,7 +329,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info) info->reg_cntfrq = arch_timer_get_cntfrq(); /* * Use the effective value of the CTR_EL0 than the raw value - * exposed by the CPU. CTR_E0.IDC field value must be interpreted + * exposed by the CPU. CTR_EL0.IDC field value must be interpreted * with the CLIDR_EL1 fields to avoid triggering false warnings * when there is a mismatch across the CPUs. Keep track of the * effective value of the CTR_EL0 in our internal records for |